 | 2008 |
|---|
| 8 |       | Hiroki Hoshino,
Ben A. Abderazek,
Kenichi Kuroda:
Advanced Optimization and Design Issues of a 32-Bit Embedded Processor Based on Produced Order Queue Computation Model.
EUC (1) 2008: 16-22 |
| 7 | | Taichi Maekawa,
Ben A. Abderazek,
Kenichi Kuroda:
Single Instruction Dual-Execution Model Processor Architecture.
EUC (1) 2008: 30-36 |
| 6 | | Junji Kitamichi,
Koji Ueda,
Kenichi Kuroda:
A Modeling of a Dynamically Reconfigurable Processor Using SystemC.
VLSI Design 2008: 91-96 |
| 5 | | Kenji Asano,
Junji Kitamichi,
Kenichi Kuroda:
Dynamic Module Library for System Level Modeling and Simulation of Dynamically Reconfigurable Systems.
JCP 3(2): 55-62 (2008) |
| 2007 |
|---|
| 4 | | Shuichi Watanabe,
Junji Kitamichi,
Kenichi Kuroda:
A Hardware Algorithm for the Minimum p-Quasi Clique Cover Problem.
FPL 2007: 139-144 |
| 3 | | Kenji Asano,
Junji Kitamichi,
Kenichi Kuroda:
Proposal of Dynamic Module Library for System Level Modeling and Simulation of Dynamically Reconfigurable Systems.
VLSI Design 2007: 373-378 |
| 2005 |
|---|
| 2 | | Toshiyuki Ito,
Junji Kitamichi,
Kenichi Kuroda,
Yuichi Okuyama:
A Master-Slave Adaptive Load-Distribution Processor Model on PCA.
IPDPS 2005 |
| 2003 |
|---|
| 1 | | Toshiyuki Ito,
Kentaro Ono,
Mayumi Ichikawa,
Yuichi Okuyama,
Kenichi Kuroda:
Reconfigurable Instruction-Level Parallel Processor Architecture.
Asia-Pacific Computer Systems Architecture Conference 2003: 208-220 |
