| 2009 | ||
|---|---|---|
| 21 | Xiaolei Zhu, Sanroku Tsukamoto, Tadahiro Kuroda: A 1 GHz CMOS comparator with dynamic offset control technique. ASP-DAC 2009: 103-104 | |
| 20 | Shusuke Kawai, Takayuki Ikari, Yutaka Takikawa, Hiroki Ishikuro, Tadahiro Kuroda: A wireless real-time on-chip bus trace system. ASP-DAC 2009: 91-92 | |
| 2008 | ||
| 19 | Jun Nishimura, Nobuo Sato, Tadahiro Kuroda: Speaker Siglet Detection for Business Microscope. ICMLA 2008: 376-381 | |
| 18 | Jun Nishimura, Nobuo Sato, Tadahiro Kuroda: Speech "Siglet" Detection for Business Microscope (concise contribution). PerCom 2008: 147-152 | |
| 17 | Daisuke Mizoguchi, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda: Constant Magnetic Field Scaling in Inductive-Coupling Data Link. IEICE Transactions 91-C(2): 200-205 (2008) | |
| 2007 | ||
| 16 | Noriyuki Miura, Tadahiro Kuroda: A 1Tb/s 3W Inductive-Coupling Transceiver Chip. ASP-DAC 2007: 92-93 | |
| 15 | Tadahiro Kuroda: Special Section on Low-Power, High-Speed LSIs and Related Technologies. IEICE Transactions 90-C(4): 655-656 (2007) | |
| 14 | Takayuki Shibasaki, Hirotaka Tamura, Kouichi Kanda, Hisakatsu Yamaguchi, Junji Ogawa, Tadahiro Kuroda: 18-GHz Clock Distribution Using a Coupled VCO Array. IEICE Transactions 90-C(4): 811-822 (2007) | |
| 13 | Kiichi Niitsu, Noriyuki Miura, Mari Inoue, Yoshihiro Nakagawa, Masamoto Tago, Masayuki Mizuno, Takayasu Sakurai, Tadahiro Kuroda: Daisy Chain Transmitter for Power Reduction in Inductive-Coupling CMOS Link. IEICE Transactions 90-C(4): 829-835 (2007) | |
| 2006 | ||
| 12 | Amit Kumar, Noriyuki Miura, Muhammad Muqsith, Tadahiro Kuroda: Active Crosstalk Cancel for High-Density Inductive Inter-chip Wireless Communication. VLSI Design 2006: 271-276 | |
| 11 | Tadahiro Kuroda: System LSI: Challenges and Opportunities. IEICE Transactions 89-C(3): 213-220 (2006) | |
| 10 | Daisuke Mizoguchi, Noriyuki Miura, Takayasu Sakurai, Tadahiro Kuroda: A 1.2 Gbps Non-contact 3D-Stacked Inter-Chip Data Communications Technology. IEICE Transactions 89-C(3): 320-326 (2006) | |
| 2004 | ||
| 9 | Noriyuki Miura, Naoki Kato, Tadahiro Kuroda: Practical methodology of post-layout gate sizing for 15% more power saving. ASP-DAC 2004: 434-437 | |
| 8 | Yuichi Hori, Kenji Shimizu, Yutaka Nakamura, Tadahiro Kuroda: A Real-Time Multi Face Detection Technique Using Positive-Negative Lines-of-Face Template. ICPR (1) 2004: 765-768 | |
| 7 | Takahide Terada, Shingo Yoshizumi, Yukitoshi Sanada, Tadahiro Kuroda: Transceiver circuits for pulse-based ultra-wideband. ISCAS (4) 2004: 349-352 | |
| 2002 | ||
| 6 | Tadahiro Kuroda: Optimization and control of VDD and VTH for low-power, high-speed CMOS design. ICCAD 2002: 28-34 | |
| 5 | Tadahiro Kuroda: Low-Power, High-Speed CMOS VLSI Design. ICCD 2002: 310-315 | |
| 1999 | ||
| 4 | Fuyuki Ichiba, Kojiro Suzuki, Shinji Mita, Tadahiro Kuroda, Tohru Furuyama: Variable supply-voltage scheme with 95%-efficiency DC-DC converter for MPEG-4 codec. ISLPED 1999: 54-59 | |
| 1998 | ||
| 3 | Kimiyoshi Usami, Mutsunori Igarashi, Takashi Ishikawa, Masahiro Kanazawa, Masafumi Takahashi, Mototsugu Hamada, Hideho Arakida, Toshihiro Terazawa, Tadahiro Kuroda: Design Methodology of Ultra Low-Power MPEG4 Codec Core Exploiting Voltage Scaling Techniques. DAC 1998: 483-488 | |
| 1996 | ||
| 2 | Tadahiro Kuroda, Tetsuya Fujita, Shinji Mita, Toshiaki Mori, Kenji Matsuo, Masakazu Kakumu, Takayasu Sakurai: Substrate noise influence on circuit performance in variable threshold-voltage scheme. ISLPED 1996: 309-312 | |
| 1 | Tadahiro Kuroda, Takayasu Sakurai: Threshold-Volgage control schemes through substrate-bias for low-power high-speed CMOS LSI design. VLSI Signal Processing 13(2-3): 191-201 (1996) | |