Wieslaw Kuzmicz

	2008
12		Witold A. Pleskacz, Maksim Jenihhin, Jaan Raik, Michal Rakowski, Raimund Ubar, Wieslaw Kuzmicz: Hierarchical Analysis of Short Defects between Metal Lines in CMOS IC. DSD 2008: 729-734
	2005
11		Joachim Sudbrock, Jaan Raik, Raimund Ubar, Wieslaw Kuzmicz, Witold A. Pleskacz: Defect-Oriented Test- and Layout-Generation for Standard-Cell ASIC Designs. DSD 2005: 79-82
	2004
10		Adam Wojtasik, Zbigniew Jaworski, Wieslaw Kuzmicz, Andrzej Wielgus, Andrzej Wakanis, Dariusz Sarna: Fuzzy logic controller for rate-adaptive heart pacemaker. Appl. Soft Comput. 4(3): 259-270 (2004)
	2002
9		Witold A. Pleskacz, Tomasz Borejko, Wieslaw Kuzmicz: CMOS Standard Cells Characterization for IDDQ Testing. DFT 2002: 390-398
8		André Schneider, Karl-Heinz Diener, Eero Ivask, Raimund Ubar, Elena Gramatová, Thomas Hollstein, Wieslaw Kuzmicz, Zebo Peng: Integrated Design and Test Generation Under Internet Based Environment MOSCITO. DSD 2002: 187-195
7		T. Cibáková, María Fischerová, Elena Gramatová, Wieslaw Kuzmicz, Witold A. Pleskacz, Jaan Raik, Raimund Ubar: Hierarchical test generation for combinational circuits with real defects coverage. Microelectronics Reliability 42(7): 1141-1149 (2002)
	2001
6		Witold A. Pleskacz, Dominik Kasprowicz, Tomasz Oleszczak, Wieslaw Kuzmicz: CMOS Standard Cells Characterization for Defect Based Testing. DFT 2001: 384-
5		Wieslaw Kuzmicz, Witold A. Pleskacz, Jaan Raik, Raimund Ubar: Defect-Oriented Fault Simulation and Test Generation in Digital Circuits. ISQED 2001: 365-371
4		Mykola Blyzniuk, Irena Kazymyra, Wieslaw Kuzmicz, Witold A. Pleskacz, Jaan Raik, Raimund Ubar: Probabilistic analysis of CMOS physical defects in VLSI circuits for test coverage improvement. Microelectronics Reliability 41(12): 2023-2040 (2001)
	2000
3		Wieslaw Kuzmicz: Internet-Based Virtual Manufacturing: A Verification Tool for IC Designs. ISQED 2000: 315-320
	1997
2		Zbigniew Jaworski, Mariusz Niewczas, Wieslaw Kuzmicz: Extension of Inductive Fault Analysis to Parametric Faults in Analog Circuits with Application to Test Generation. VTS 1997: 172-176
	1986
1		Wieslaw Kuzmicz: Modeling of Minority Carrier Current in Heavily Doped Regions of Bipolar Regions. IEEE Trans. on CAD of Integrated Circuits and Systems 5(1): 204-214 (1986)

Coauthor Index

1	Mykola Blyzniuk	[4]
2	Tomasz Borejko	[9]
3	T. Cibáková	[7]
4	Karl-Heinz Diener	[8]
5	María Fischerová	[7]
6	Elena Gramatová	[7] [8]
7	Thomas Hollstein	[8]
8	Eero Ivask	[8]
9	Zbigniew Jaworski	[2] [10]
10	Maksim Jenihhin	[12]
11	Dominik Kasprowicz	[6]
12	Irena Kazymyra	[4]
13	Mariusz Niewczas	[2]
14	Tomasz Oleszczak	[6]
15	Zebo Peng	[8]
16	Witold A. Pleskacz	[4] [5] [6] [7] [9] [11] [12]
17	Jaan Raik	[4] [5] [7] [11] [12]
18	Michal Rakowski	[12]
19	Dariusz Sarna	[10]
20	André Schneider	[8]
21	Joachim Sudbrock	[11]
22	Raimund Ubar	[4] [5] [7] [8] [11] [12]
23	Andrzej Wakanis	[10]
24	Andrzej Wielgus	[10]
25	Adam Wojtasik	[10]

Colors in the list of coauthors