Sergei Y. Larin

	1999
3		Sergei Y. Larin, Thomas M. Conte: Compiler-Driven Cached Code Compression Schemes for Embedded ILP Processors. MICRO 1999: 82-92
	1998
2		Chao-ying Fu, Matthew D. Jennings, Sergei Y. Larin, Thomas M. Conte: Value Speculation Scheduling for High Performance Processors. ASPLOS 1998: 262-271
	1996
1		Thomas M. Conte, Sanjeev Banerjia, Sergei Y. Larin, Kishore N. Menezes, Sumedh W. Sathaye: Instruction Fetch Mechanisms for VLIW Architectures with Compressed Encodings. MICRO 1996: 201-211

Coauthor Index

1	Sanjeev Banerjia	[1]
2	Thomas M. Conte	[1] [2] [3]
3	Chao-ying Fu	[2]
4	Matthew D. Jennings	[2]
5	Kishore N. Menezes	[1]
6	Sumedh W. Sathaye	[1]