Yusuf Leblebici

	2012
108		Omer Can Akgun, Joachim Neves Rodrigues, Yusuf Leblebici, Viktor Öwall: High-Level Energy Estimation in the Sub-V$_{{\rm T}}$ Domain: Simulation and Measurement of a Cardiac Event Detector. IEEE Trans. Biomed. Circuits and Systems 6(1): 15-27 (2012)
107		Davide Sacchetto, Giovanni De Micheli, Yusuf Leblebici: Multiterminal Memristive Nanowire Devices for Logic and Memory Applications: A Review. Proceedings of the IEEE 100(6): 2008-2020 (2012)
	2011
106		Wayne Burleson, Yusuf Leblebici: Hardware security in VLSI. ACM Great Lakes Symposium on VLSI 2011: 447-448
105		Alessandro Cevrero, Francesco Regazzoni, Micheal Schwander, Stéphane Badel, Paolo Ienne, Yusuf Leblebici: Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library. DAC 2011: 1014-1019
104		Mohamed M. Sabry, Arvind Sridhar, David Atienza, Yuksel Temiz, Yusuf Leblebici, S. Szczukiewicz, N. Borhani, J. R. Thome, Thomas Brunschwiler, Bruno Michel: Towards thermally-aware design of 3D MPSoCs with inter-tier cooling. DATE 2011: 1466-1471
103		Armin Tajalli, Yusuf Leblebici: Design trade-offs in ultra-low-power CMOS and STSCL digital systems. ECCTD 2011: 544-547
102		Davide Sacchetto, Michele De Marchi, Giovanni De Micheli, Yusuf Leblebici: Alternative design methodologies for the next generation logic switch. ICCAD 2011: 231-234
101		Christoph Roth, Alessandro Cevrero, Christoph Studer, Yusuf Leblebici, Andreas Burg: Area, throughput, and energy-efficiency trade-offs in the VLSI implementation of LDPC decoders. ISCAS 2011: 1772-1775
100		Vahid Majidzadeh, Alexandre Schmid, Yusuf Leblebici: Energy Efficient Low-Noise Neural Recording Amplifier With Enhanced Noise Efficiency Factor. IEEE Trans. Biomed. Circuits and Systems 5(3): 262-271 (2011)
99		Armin Tajalli, Yusuf Leblebici: Design Trade-offs in Ultra-Low-Power Digital Nanoscale CMOS. IEEE Trans. on Circuits and Systems 58-I(9): 2189-2200 (2011)
98		Armin Tajalli, Yusuf Leblebici: Low-Power and Widely Tunable Linearized Biquadratic Low-Pass Transconductor-C Filter. IEEE Trans. on Circuits and Systems 58-II(3): 159-163 (2011)
97		Bahman Kheradmand Boroujeni, Christian Piguet, Yusuf Leblebici: Optimal Logic Architecture and Supply Voltage Selection Method to Reduce the Impact of the Threshold Voltage Variation on the Timing. J. Low Power Electronics 7(2): 285-293 (2011)
	2010
96		Bahman Kheradmand Boroujeni, Christian Piguet, Yusuf Leblebici: AVGS-Mux style: A novel technology and device independent technique for reducing power and compensating process variations in FPGA fabrics. DATE 2010: 339-344
95		Armin Tajalli, Yusuf Leblebici: Ultra-low power mixed-signal design platform using subthreshold source-coupled circuits. DATE 2010: 711-716
94		Davide Sacchetto, M. Haykel Ben Jamaa, Giovanni De Micheli, Yusuf Leblebici: Design aspects of carry lookahead adders with vertically-stacked nanowire transistors. ISCAS 2010: 1715-1718
93		Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici: Selective redundancy-based design techniques for the minimization of local delay variations. ISCAS 2010: 2486-2489
92		Vahid Majidzadeh, Laurent Jacques, Alexandre Schmid, Pierre Vandergheynst, Yusuf Leblebici: A (256×256) pixel 76.7mW CMOS imager/ compressor based on real-time In-pixel compressive sensing. ISCAS 2010: 2956-2959
91		Davide Sacchetto, M. Haykel Ben Jamaa, Sandro Carrara, Giovanni De Micheli, Yusuf Leblebici: Memristive devices fabricated with silicon nanowire schottky barrier transistors. ISCAS 2010: 9-12
90		Bahman Kheradmand Boroujeni, Christian Piguet, Yusuf Leblebici: Logic Architecture and VDD Selection for Reducing the Impact of Intra-die Random VT Variations on Timing. PATMOS 2010: 170-179
89		Fengda Sun, Alessandro Cevrero, Panagiotis Athanasopoulos, Yusuf Leblebici: Design and feasibility of multi-Gb/s quasi-serial vertical interconnects based on TSVs for 3D ICs. VLSI-SoC 2010: 149-154
88		Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici: Output probability density functions of logic circuits: Modeling and fault-tolerance evaluation. VLSI-SoC 2010: 328-334
87		Armin Tajalli, Yusuf Leblebici: Nanowatt Range Folding-Interpolating Analog-to-Digital Converter Using Subthreshold Source-Coupled Circuits. J. Low Power Electronics 6(1): 211-217 (2010)
86		Massimo Alioto, Stéphane Badel, Yusuf Leblebici: Optimization of the wire grid size for differential routing: Analysis and impact on the power-delay-area tradeoff. Microelectronics Journal 41(10): 669-679 (2010)
85		Sandro Carrara, Andrea Cavallini, Yusuf Leblebici, Giovanni De Micheli, Vijayender Bhalla, Francesco Valle, Bruno Samorì, Luca Benini, Bruno Riccò, Inger Vikholm-Lundin, Tony Munter: Capacitance DNA bio-chips improved by new probe immobilization strategies. Microelectronics Journal 41(11): 711-717 (2010)
	2009
84		Thomas Brunschwiler, Stephan Paredes, Ute Drechsler, Bruno Michel, W. Cesar, G. Toral, Yuksel Temiz, Yusuf Leblebici: Validation of the porous-medium approach to model interlayer-cooled 3D-chip stacks. 3DIC 2009: 1-10
83		M. Haykel Ben Jamaa, David Atienza, Yusuf Leblebici, Giovanni De Micheli: A stochastic perturbative approach to design a defect-aware thresholder in the sense amplifier of crossbar memories. ASP-DAC 2009: 835-840
82		M. Haykel Ben Jamaa, Gianfranco Cerofolini, Yusuf Leblebici, Giovanni De Micheli: Complete nanowire crossbar framework optimized for the multi-spacer patterning technique. CASES 2009: 11-16
81		Francesco Regazzoni, Alessandro Cevrero, François-Xavier Standaert, Stéphane Badel, Theo Kluter, Philip Brisk, Yusuf Leblebici, Paolo Ienne: A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions. CHES 2009: 205-219
80		Armin Tajalli, Yusuf Leblebici: A widely-tunable and ultra-low-power MOSFET-C filter operating in subthreshold. CICC 2009: 593-596
79		M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De Micheli: Decoding nanowire arrays fabricated with the multi-spacer patterning technique. DAC 2009: 77-82
78		Ayse Kivilcim Coskun, José L. Ayala, David Atienza, Tajana Simunic Rosing, Yusuf Leblebici: Dynamic thermal management in 3D multicore architectures. DATE 2009: 1410-1415
77		Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici: Optimization of Nanoelectronic Systems Reliability Under Massive Defect Density Using Distributed R-fold Modular Redundancy (DRMR). DFT 2009: 340-348
76		Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Philip Brisk, Yusuf Leblebici, Paolo Ienne, Maurizio Skerlj: 3D configuration caching for 2D FPGAs. FPGA 2009: 286
75		Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Maurizio Skerlj, Philip Brisk, Yusuf Leblebici, Paolo Ienne: Using 3D integration technology to realize multi-context FPGAs. FPL 2009: 507-510
74		Laurent Jacques, Pierre Vandergheynst, Alexandre Bibet, Vahid Majidzadeh, Alexandre Schmid, Yusuf Leblebici: CMOS compressed imaging by Random Convolution. ICASSP 2009: 1113-1116
73		Panagiotis Athanasopoulos, Philip Brisk, Yusuf Leblebici, Paolo Ienne: Memory organization and data layout for instruction set extensions with architecturally visible storage. ICCAD 2009: 689-696
72		Andrew Kilinga Kikombo, Tetsuya Asai, Takahide Oya, Alexandre Schmid, Yusuf Leblebici, Yoshihito Amemiya: A pulse-density modulation circuit exhibiting noise shaping with single-electron neurons. IJCNN 2009: 1600-1605
71		Massimo Alioto, Stéphane Badel, Yusuf Leblebici: Optimization of Wire Grid Size for Differential Routing and Impact on the Power-delay-area Tradeoff. ISCAS 2009: 1285-1288
70		Armin Tajalli, Yusuf Leblebici: Subthreshold Leakage Reduction: A Comparative Study of SCL and CMOS Design. ISCAS 2009: 2553-2556
69		Massimo Alioto, Yusuf Leblebici: Analysis and Design of Ultra-low Power Subthreshold MCML Gates. ISCAS 2009: 2557-2560
68		Kanber Mithat Silay, Denis Dondi, Luca Larcher, Michel J. Declercq, Luca Benini, Yusuf Leblebici, Catherine Dehollain: Load Optimization of an Inductive Power Link for Remote Powering of Biomedical Implants. ISCAS 2009: 533-536
67		Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici: Optimization of Nanoelectronic Systems Reliability by Reducing Logic Depth. NanoNet 2009: 70-75
66		José L. Ayala, Arvind Sridhar, Vinod Pangracious, David Atienza, Yusuf Leblebici: Through Silicon Via-Based Grid for Thermal Control in 3D Chips. NanoNet 2009: 90-98
65		Yusuf Leblebici: Subthreshold Circuit Design for Ultra-Low-Power Applications. PATMOS 2009: 3
64		Joachim Neves Rodrigues, Omer Can Akgun, Puneet Acharya, Adolfo de la Calle, Yusuf Leblebici, Viktor Öwall: Energy Dissipation Reduction of a Cardiac Event Detector in the Sub-Vt Domain By Architectural Folding. PATMOS 2009: 347-356
63		Armin Tajalli, Massimo Alioto, Yusuf Leblebici: Improving Power-Delay Performance of Ultra-Low-Power Subthreshold SCL Circuits. IEEE Trans. on Circuits and Systems 56-II(2): 127-131 (2009)
62		Armin Tajalli, Yusuf Leblebici: Leakage Current Reduction Using Subthreshold Source-Coupled Logic. IEEE Trans. on Circuits and Systems 56-II(5): 374-378 (2009)
61		Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici: On the Reliability of Post-CMOS and SET Systems. IJNMC 1(2): 43-57 (2009)
60		Andrew Kilinga Kikombo, Tetsuya Asai, Takahide Oya, Alexandre Schmid, Yusuf Leblebici: A Neuromorphic Single-Electron Circuit for Noise-Shaping Pulse-Density Modulation. IJNMC 1(2): 80-92 (2009)
59		Armin Tajalli, Elizabeth J. Brauer, Yusuf Leblebici: Ultra-low power 32-bit pipelined adder using subthreshold source-coupled logic with 5 fJ/stage PDP. Microelectronics Journal 40(6): 973-978 (2009)
58		Neil Joye, Alexandre Schmid, Yusuf Leblebici: Electrical modeling of the cell-electrode interface for recording neural activity from high-density microelectrode arrays. Neurocomputing 73(1-3): 250-259 (2009)
57		Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Seyed Hosein Attarzadeh Niaki, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Philip Brisk, Yusuf Leblebici, Paolo Ienne: Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs. TRETS 2(2): (2009)
56		Francesco Regazzoni, Thomas Eisenbarth, Axel Poschmann, Johann Großschädl, Frank K. Gürkaynak, Marco Macchetti, Zeynep Toprak Deniz, Laura Pozzi, Christof Paar, Yusuf Leblebici, Paolo Ienne: Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology. Transactions on Computational Science 4: 230-243 (2009)
	2008
55		Seyed Hosein Attarzadeh Niaki, Alessandro Cevrero, Philip Brisk, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne: Design space exploration for field programmable compressor trees. CASES 2008: 207-216
54		M. Haykel Ben Jamaa, David Atienza, Yusuf Leblebici, Giovanni De Micheli: Programmable logic circuits based on ambipolar CNFET. DAC 2008: 339-340
53		Carlotta Guiducci, Alexandre Schmid, Frank K. Gürkaynak, Yusuf Leblebici: Novel Front-End Circuit Architectures for Integrated Bio-Electronic Interfaces. DATE 2008: 1328-1333
52		Stéphane Badel, Erdem Guleyupoglu, Ozgur Inac, Anna Pena Martinez, Paolo Vietti, Frank K. Gürkaynak, Yusuf Leblebici: A Generic Standard Cell Design Methodology for Differential Circuit Styles. DATE 2008: 843-848
51		Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Philip Brisk, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne: Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. FPGA 2008: 181-190
50		Armin Tajalli, Frank K. Gürkaynak, Yusuf Leblebici, Massimo Alioto, Elizabeth J. Brauer: Improving the power-delay product in SCL circuits using source follower output stage. ISCAS 2008: 145-148
49		Bahman Kheradmand Boroujeni, Christian Piguet, Yusuf Leblebici: Reverse Vgs Static CMOS (RVGS-SCMOS); A New Technique for Dynamically Compensating the Process Variations in Sub-threshold Designs. PATMOS 2008: 11-20
48		Armin Tajalli, Massimo Alioto, Elizabeth J. Brauer, Yusuf Leblebici: Improving the Power-Delay Performance in Subthreshold Source-Coupled Logic Circuits. PATMOS 2008: 21-30
47		M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli: Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories. IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 2053-2067 (2008)
46		Omer Can Akgun, Yusuf Leblebici: Energy Efficiency Comparison of Asynchronous and Synchronous Circuits Operating in the Sub-Threshold Regime. J. Low Power Electronics 4(3): 320-336 (2008)
45		Stéphane Badel, Alexandre Schmid, Yusuf Leblebici: CMOS realization of two-dimensional mixed analog-digital Hamming distance discriminator circuits for real-time imaging applications. Microelectronics Journal 39(12): 1817-1828 (2008)
	2007
44		Milos Stanisavljevic, Frank K. Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Maria Gabrani: Design and realization of a fault-tolerant 90nm CMOS cryptographic engine capable of performing under massive defect density. ACM Great Lakes Symposium on VLSI 2007: 204-207
43		M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli: Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays. ICCAD 2007: 765-772
42		Francesco Regazzoni, Stéphane Badel, Thomas Eisenbarth, Johann Großschädl, Axel Poschmann, Zeynep Toprak Deniz, Marco Macchetti, Laura Pozzi, Christof Paar, Yusuf Leblebici, Paolo Ienne: A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. ICSAMOS 2007: 209-214
41		Stéphane Badel, Yusuf Leblebici: Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage. ISCAS 2007: 1871-1874
40		Ilhan Hatirnaz, Stéphane Badel, Nuria Pazos, Yusuf Leblebici, Srinivasan Murali, David Atienza, Giovanni De Micheli: Early wire characterization for predictable network-on-chip global interconnects. SLIP 2007: 57-64
39		I. Hatyrnaz, Stéphane Badel, Nuria Pazos, Yusuf Leblebici: Predictable system interconnects through accurate early wire characterization. SoCC 2007: 287-290
38		Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi, Yusuf Leblebici: Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit CoRR abs/0710.4727: (2007)
37		Armin Tajalli, Paul Muller, Yusuf Leblebici: Tradeoffs in Design of Low-Power Gated-Oscillator Clock and Data Recovery Circuits. J. Low Power Electronics 3(3): 345-354 (2007)
	2006
36		Ayse Kivilcim Coskun, Tajana Simunic Rosing, Yusuf Leblebici, Giovanni De Micheli: A simulation methodology for reliability analysis in multi-core SoCs. ACM Great Lakes Symposium on VLSI 2006: 95-99
35		Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici: Fault-Tolerance of Robust Feed-Forward Architecture Using Single-Ended and Differential Deep-Submicron Circuits Under Massive Defect Density. IJCNN 2006: 2771-2778
34		Armin Tajalli, Paul Muller, Seyed Mojtaba Atarodi, Yusuf Leblebici: Analysis and modeling of jitter and frequency tolerance in gated oscillator based CDRs. ISCAS 2006
33		Elizabeth J. Brauer, Ilhan Hatirnaz, Stéphane Badel, Yusuf Leblebici: Via-programmable expanded universal logic gate in MCML for structured ASIC applications: circuit design. ISCAS 2006
32		Omer Can Akgun, Yusuf Leblebici: Weak inversion performance of CMOS and DCVSPG logic families in sub-300 mV range. ISCAS 2006
31		Derin Derin Harmanci, Nuria Pazos, Paolo Ienne, Yusuf Leblebici: A Predictable Communication Scheme for Embedded Multiprocessor Systems. VLSI-SoC 2006: 152-157
30		Stéphane Badel, Ilhan Hatirnaz, Yusuf Leblebici, Elizabeth J. Brauer: Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells. VLSI-SoC 2006: 234-238
29		Zeynep Toprak Deniz, Yusuf Leblebici, Eric A. Vittoz: Configurable On-Line Global Energy Optimization in Multi-Core Embedded Systems Using Principles of Analog Computation. VLSI-SoC 2006: 379-384
28		Ayse Kivilcim Coskun, Tajana Simunic, Kresimir Mihic, Giovanni De Micheli, Yusuf Leblebici: Analysis and Optimization of MPSoC Reliability. J. Low Power Electronics 2(1): 56-69 (2006)
	2005
27		Sorin Cotofana, Alexandre Schmid, Yusuf Leblebici, Adrian M. Ionescu, Oliver Soffke, Peter Zipf, Manfred Glesner, A. Rubio: CONAN - A Design Exploration Framework for Reliable Nano-Electronics. ASAP 2005: 260-267
26		Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi, Yusuf Leblebici: Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit. DATE 2005: 258-263
25		Soner Yaldiz, Alper Demir, Serdar Tasiran, Paolo Ienne, Yusuf Leblebici: Characterizing and Exploiting Task-Load Variability and Correlation for Energy Management in multi-core systems. ESTImedia 2005: 135-140
24		Paul Muller, Yusuf Leblebici: Jitter Tolerance Analysis of Clock and Data Recovery Circuits. FDL 2005: 143-147
23		Zeynep Toprak Deniz, Yusuf Leblebici: Low-power current mode logic for improved DPA-resistance in embedded systems. ISCAS (2) 2005: 1059-1062
22		Mehmet Derin Harmanci, Nuria Pazos Escudero, Yusuf Leblebici, Paolo Ienne: Quantitative modelling and comparison of communication schemes to guarantee quality-of-service in networks-on-chip. ISCAS (2) 2005: 1782-1785
21		Takahide Oya, Tetsuya Asai, Yoshihito Amemiya, Alexandre Schmid, Yusuf Leblebici: Single-electron circuit for inhibitory spiking neural network with fault-tolerant architecture. ISCAS (3) 2005: 2535-2538
20		Armin Tajalli, Paul Muller, Seyed Mojtaba Atarodi, Yusuf Leblebici: A low-power, multichannel gated oscillator-based CDR for short-haul applications. ISLPED 2005: 107-110
19		Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici: A Methodology for Reliability Enhancement of Nanometer-Scale Digital Systems Based on a-priori Functional Fault- Tolerance Analysis. VLSI-SoC 2005: 111-125
18		Takahide Oya, Alexandre Schmid, Tetsuya Asai, Yusuf Leblebici, Yoshihito Amemiya: On the fault tolerance of a clustered single-electron neural network for differential enhancement. IEICE Electronic Express 2(3): 76-80 (2005)
	2004
17		Elizabeth J. Brauer, Yusuf Leblebici: Low noise MCML prefix adders using 0.18 µm CMOS technology. Circuits, Signals, and Systems 2004: 467-470
16		Elizabeth J. Brauer, Yusuf Leblebici: Sub-70 PS full adder IN 0.18 µm CMOS current-mode logic. Circuits, Signals, and Systems 2004: 483-487
15		Alexandre Schmid, Yusuf Leblebici: A Highly Fault Tolerant PLA Architecture for Failure-Prone Nanometer CMOS and Novel Quantum Device Technologies. DFT 2004: 39-47
14		Alexandre Schmid, Yusuf Leblebici: Robust and fault-tolerant circuit design for nanometer-scale devices and single-electron transistors. ISCAS (3) 2004: 685-688
13		Ilhan Hatirnaz, Yusuf Leblebici: Modelling and implementation of twisted differential on-chip interconnects for crosstalk noise reduction. ISCAS (5) 2004: 185-188
12		Stéphane Badel, Alexandre Schmid, Yusuf Leblebici: Mixed analog-digital image processing circuit based on Hamming artificial neural network architecture. ISCAS (5) 2004: 780-783
11		Alexandre Schmid, Yusuf Leblebici: Robust circuit and system design methodologies for nanometer-scale devices and single-electron transistors. IEEE Trans. VLSI Syst. 12(11): 1156-1166 (2004)
	2003
10		Stéphane Badel, Alexandre Schmid, Yusuf Leblebici: VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications. ESANN 2003: 445-450
9		Zeynep Toprak Deniz, Yusuf Leblebici: Design and realization of a modular 200 MSample/s 12-bit pipelined A/D converter block using deep-submicron digital CMOS technology. ISCAS (1) 2003: 841-844
8		Turan Demirci, Ilhan Hatirnaz, Yusuf Leblebici: Full-custom CMOS realization of a high-performance binary sorting engine with linear area-time complexity. ISCAS (5) 2003: 453-456
	1999
7		Ilhan Hatirnaz, Frank K. Gürkaynak, Yusuf Leblebici: Realization of a programmable rank-order filter architecture using capacitive threshold logic gates. ISCAS (1) 1999: 435-438
6		Alexandre Schmid, D. Bowler, R. Baumgartner, Yusuf Leblebici: A novel analog-digital flash converter architecture based on capacitive threshold gates. ISCAS (2) 1999: 172-175
	1993
5		Yung-Ho Shih, Yusuf Leblebici, Sung-Mo Kang: ILLIADS: a fast timing and reliability simulator for digital MOS circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 12(9): 1387-1402 (1993)
	1992
4		Yusuf Leblebici, Sung-Mo Kang: Modeling of nMOS transistors for simulation of hot-carrier-induced device and circuit degradation. IEEE Trans. on CAD of Integrated Circuits and Systems 11(2): 235-246 (1992)
	1991
3		Yung-Ho Shih, Yusuf Leblebici, Sung-Mo Kang: New Simulation Methods for MOS VLSI Timing and Reliability. ICCAD 1991: 162-165
2		Carlos H. Díaz, Sung-Mo Kang, Yusuf Leblebici: An accurate analytical delay model for BiCMOS driver circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 10(5): 577-588 (1991)
	1990
1		Yusuf Leblebici, Sung-Mo Kang: An Integrated Hot-Carrier Degradation Simulator for VLSI Reliability Analysis. ICCAD 1990: 400-403

Coauthor Index

1	Puneet Acharya	[64]
2	Omer Can Akgun	[32] [46] [64] [108]
3	Massimo Alioto	[48] [50] [63] [69] [71] [86]
4	Yoshihito Amemiya	[18] [21] [72]
5	Tetsuya Asai	[18] [21] [60] [72]
6	Seyed Mojtaba Atarodi	[20] [26] [34] [38]
7	Panagiotis Athanasopoulos	[51] [57] [73] [75] [76] [89]
8	David Atienza (David Atienza Alonso)	[40] [43] [47] [54] [66] [78] [83] [104]
9	José Luis Ayala (José L. Ayala)	[66] [78]
10	Stéphane Badel	[10] [12] [30] [33] [39] [40] [41] [42] [45] [52] [71] [81] [86] [105]
11	R. Baumgartner	[6]
12	Luca Benini	[68] [85]
13	Vijayender Bhalla	[85]
14	Alexandre Bibet	[74]
15	N. Borhani	[104]
16	Bahman Kheradmand Boroujeni	[49] [90] [96] [97]
17	Didier Bouvet	[43] [47]
18	D. Bowler	[6]
19	Elizabeth J. Brauer	[16] [17] [30] [33] [48] [50] [59]
20	Philip Brisk	[51] [55] [57] [73] [75] [76] [81]
21	Thomas Brunschwiler	[84] [104]
22	Andreas Burg	[101]
23	Wayne P. Burleson (Wayne Burleson)	[106]
24	Adolfo de la Calle	[64]
25	Sandro Carrara	[85] [91]
26	Andrea Cavallini	[85]
27	Gianfranco Cerofolini	[82]
28	W. Cesar	[84]
29	Alessandro Cevrero	[51] [55] [57] [75] [76] [81] [89] [101] [105]
30	Ayse Kivilcim Coskun	[28] [36] [78]
31	Sorin Cotofana (Sorin Dan Cotofana)	[27]
32	Michel J. Declercq	[68]
33	Catherine Dehollain	[68]
34	Alper Demir	[25]
35	Turan Demirci	[8]
36	Zeynep Toprak Deniz	[9] [23] [29] [42] [56]
37	Carlos H. Díaz	[2]
38	Denis Dondi	[68]
39	Ute Drechsler	[84]
40	Thomas Eisenbarth	[42] [56]
41	Nuria Pazos Escudero	[22]
42	Maria Gabrani	[44]
43	Manfred Glesner	[27]
44	Johann Großschädl	[42] [56]
45	Carlotta Guiducci	[53]
46	Erdem Guleyupoglu	[52]
47	Frank K. Gürkaynak	[7] [44] [50] [51] [52] [53] [55] [56] [57]
48	Derin Derin Harmanci	[31]
49	Mehmet Derin Harmanci	[22]
50	Ilhan Hatirnaz	[7] [8] [13] [30] [33] [40]
51	I. Hatyrnaz	[39]
52	Paolo Ienne	[22] [25] [31] [42] [51] [55] [56] [57] [73] [75] [76] [81] [105]
53	Ozgur Inac	[52]
54	Adrian M. Ionescu	[27] [43] [47]
55	Laurent Jacques	[74] [92]
56	M. Haykel Ben Jamaa	[43] [47] [54] [79] [82] [83] [91] [94]
57	Neil Joye	[58]
58	Sung-Mo Kang	[1] [2] [3] [4] [5]
59	Andrew Kilinga Kikombo	[60] [72]
60	Theo Kluter	[81]
61	Luca Larcher	[68]
62	Marco Macchetti	[42] [56]
63	Vahid Majidzadeh	[74] [92] [100]
64	Michele De Marchi	[102]
65	Anna Pena Martinez	[52]
66	Bruno Michel	[84] [104]
67	Giovanni De Micheli	[28] [36] [40] [43] [47] [54] [79] [82] [83] [85] [91] [94] [102] [107]
68	Kresimir Mihic	[28]
69	Kirsten E. Moselund	[43] [47]
70	Paul Muller	[20] [24] [26] [34] [37] [38]
71	Tony Munter	[85]
72	Srinivasan Murali	[40]
73	Seyed Hosein Attarzadeh Niaki	[55] [57]
74	Chrysostomos Nicopoulos	[55] [57]
75	Viktor Öwall	[64] [108]
76	Takahide Oya	[18] [21] [60] [72]
77	Christof Paar	[42] [56]
78	Vinod Pangracious	[66]
79	Hadi Parandeh-Afshar	[51] [57] [75] [76]
80	Stephan Paredes	[84]
81	Nuria Pazos	[31] [39] [40]
82	Christian Piguet	[49] [90] [96] [97]
83	Axel Poschmann	[42] [56]
84	Laura Pozzi	[42] [56]
85	Francesco Regazzoni	[42] [56] [81] [105]
86	Bruno Riccò	[85]
87	Joachim Neves Rodrigues	[64] [108]
88	Christoph Roth	[101]
89	A. Rubio	[27]
90	Mohamed M. Sabry	[104]
91	Davide Sacchetto	[91] [94] [102] [107]
92	Bruno Samorì	[85]
93	Alexandre Schmid	[6] [10] [11] [12] [14] [15] [18] [19] [21] [27] [35] [44] [45] [53] [58] [60] [61] [67] [72] [74] [77] [88] [92] [93] [100]
94	Micheal Schwander	[105]
95	Yung-Ho Shih	[3] [5]
96	Kanber Mithat Silay	[68]
97	Tajana Simunic (Tajana Simunic Rosing)	[28] [36] [78]
98	Maurizio Skerlj	[75] [76]
99	Oliver Soffke	[27]
100	Arvind Sridhar	[66] [104]
101	François-Xavier Standaert	[81]
102	Milos Stanisavljevic	[19] [35] [44] [61] [67] [77] [88] [93]
103	Christoph Studer	[101]
104	Fengda Sun	[89]
105	S. Szczukiewicz	[104]
106	Armin Tajalli	[20] [26] [34] [37] [38] [48] [50] [59] [62] [63] [70] [80] [87] [95] [98] [99] [103]
107	Serdar Tasiran	[25]
108	Yuksel Temiz	[84] [104]
109	J. R. Thome	[104]
110	G. Toral	[84]
111	Francesco Valle	[85]
112	Pierre Vandergheynst	[74] [92]
113	Ajay K. Verma	[51] [57]
114	Paolo Vietti	[52]
115	Inger Vikholm-Lundin	[85]
116	Eric A. Vittoz	[29]
117	Soner Yaldiz	[25]
118	Peter Zipf	[27]

Colors in the list of coauthors

Last update Fri May 25 01:42:58 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page