Yusuf Leblebici

	2009
63		M. Haykel Ben Jamaa, David Atienza, Yusuf Leblebici, Giovanni De Micheli: A stochastic perturbative approach to design a defect-aware thresholder in the sense amplifier of crossbar memories. ASP-DAC 2009: 835-840
62		M. Haykel Ben Jamaa, Gianfranco Cerofolini, Yusuf Leblebici, Giovanni De Micheli: Complete nanowire crossbar framework optimized for the multi-spacer patterning technique. CASES 2009: 11-16
61		Francesco Regazzoni, Alessandro Cevrero, François-Xavier Standaert, Stéphane Badel, Theo Kluter, Philip Brisk, Yusuf Leblebici, Paolo Ienne: A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions. CHES 2009: 205-219
60		M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De Micheli: Decoding nanowire arrays fabricated with the multi-spacer patterning technique. DAC 2009: 77-82
59		Ayse Kivilcim Coskun, José L. Ayala, David Atienza, Tajana Simunic Rosing, Yusuf Leblebici: Dynamic thermal management in 3D multicore architectures. DATE 2009: 1410-1415
58		Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici: Optimization of Nanoelectronic Systems Reliability Under Massive Defect Density Using Distributed R-fold Modular Redundancy (DRMR). DFT 2009: 340-348
57		Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Philip Brisk, Yusuf Leblebici, Paolo Ienne, Maurizio Skerlj: 3D configuration caching for 2D FPGAs. FPGA 2009: 286
56		Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici: Optimization of Nanoelectronic Systems Reliability by Reducing Logic Depth. NanoNet 2009: 70-75
55		José L. Ayala, Arvind Sridhar, Vinod Pangracious, David Atienza, Yusuf Leblebici: Through Silicon Via-Based Grid for Thermal Control in 3D Chips. NanoNet 2009: 90-98
54		Neil Joye, Alexandre Schmid, Yusuf Leblebici: Electrical modeling of the cell-electrode interface for recording neural activity from high-density microelectrode arrays. Neurocomputing 73(1-3): 250-259 (2009)
53		Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Seyed Hosein Attarzadeh Niaki, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Philip Brisk, Yusuf Leblebici, Paolo Ienne: Field Programmable Compressor Trees: Acceleration of Multi-Input Addition on FPGAs. TRETS 2(2): (2009)
52		Francesco Regazzoni, Thomas Eisenbarth, Axel Poschmann, Johann Großschädl, Frank K. Gürkaynak, Marco Macchetti, Zeynep Toprak Deniz, Laura Pozzi, Christof Paar, Yusuf Leblebici, Paolo Ienne: Evaluating Resistance of MCML Technology to Power Analysis Attacks Using a Simulation-Based Methodology. Transactions on Computational Science 4: 230-243 (2009)
	2008
51		Seyed Hosein Attarzadeh Niaki, Alessandro Cevrero, Philip Brisk, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne: Design space exploration for field programmable compressor trees. CASES 2008: 207-216
50		M. Haykel Ben Jamaa, David Atienza, Yusuf Leblebici, Giovanni De Micheli: Programmable logic circuits based on ambipolar CNFET. DAC 2008: 339-340
49		Carlotta Guiducci, Alexandre Schmid, Frank K. Gürkaynak, Yusuf Leblebici: Novel Front-End Circuit Architectures for Integrated Bio-Electronic Interfaces. DATE 2008: 1328-1333
48		Stéphane Badel, Erdem Guleyupoglu, Ozgur Inac, Anna Pena Martinez, Paolo Vietti, Frank K. Gürkaynak, Yusuf Leblebici: A Generic Standard Cell Design Methodology for Differential Circuit Styles. DATE 2008: 843-848
47		Alessandro Cevrero, Panagiotis Athanasopoulos, Hadi Parandeh-Afshar, Ajay K. Verma, Philip Brisk, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne: Architectural improvements for field programmable counter arrays: enabling efficient synthesis of fast compressor trees on FPGAs. FPGA 2008: 181-190
46		Armin Tajalli, Frank K. Gürkaynak, Yusuf Leblebici, Massimo Alioto, Elizabeth J. Brauer: Improving the power-delay product in SCL circuits using source follower output stage. ISCAS 2008: 145-148
45		Bahman Kheradmand Boroujeni, Christian Piguet, Yusuf Leblebici: Reverse Vgs Static CMOS (RVGS-SCMOS); A New Technique for Dynamically Compensating the Process Variations in Sub-threshold Designs. PATMOS 2008: 11-20
44		Armin Tajalli, Massimo Alioto, Elizabeth J. Brauer, Yusuf Leblebici: Improving the Power-Delay Performance in Subthreshold Source-Coupled Logic Circuits. PATMOS 2008: 21-30
43		M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli: Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories. IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 2053-2067 (2008)
	2007
42		Milos Stanisavljevic, Frank K. Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Maria Gabrani: Design and realization of a fault-tolerant 90nm CMOS cryptographic engine capable of performing under massive defect density. ACM Great Lakes Symposium on VLSI 2007: 204-207
41		M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli: Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays. ICCAD 2007: 765-772
40		Francesco Regazzoni, Stéphane Badel, Thomas Eisenbarth, Johann Großschädl, Axel Poschmann, Zeynep Toprak Deniz, Marco Macchetti, Laura Pozzi, Christof Paar, Yusuf Leblebici, Paolo Ienne: A Simulation-Based Methodology for Evaluating the DPA-Resistance of Cryptographic Functional Units with Application to CMOS and MCML Technologies. ICSAMOS 2007: 209-214
39		Stéphane Badel, Yusuf Leblebici: Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage. ISCAS 2007: 1871-1874
38		Ilhan Hatirnaz, Stéphane Badel, Nuria Pazos, Yusuf Leblebici, Srinivasan Murali, David Atienza, Giovanni De Micheli: Early wire characterization for predictable network-on-chip global interconnects. SLIP 2007: 57-64
37		Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi, Yusuf Leblebici: Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit CoRR abs/0710.4727: (2007)
	2006
36		Ayse Kivilcim Coskun, Tajana Simunic Rosing, Yusuf Leblebici, Giovanni De Micheli: A simulation methodology for reliability analysis in multi-core SoCs. ACM Great Lakes Symposium on VLSI 2006: 95-99
35		Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici: Fault-Tolerance of Robust Feed-Forward Architecture Using Single-Ended and Differential Deep-Submicron Circuits Under Massive Defect Density. IJCNN 2006: 2771-2778
34		Armin Tajalli, Paul Muller, Seyed Mojtaba Atarodi, Yusuf Leblebici: Analysis and modeling of jitter and frequency tolerance in gated oscillator based CDRs. ISCAS 2006
33		Elizabeth J. Brauer, Ilhan Hatirnaz, Stéphane Badel, Yusuf Leblebici: Via-programmable expanded universal logic gate in MCML for structured ASIC applications: circuit design. ISCAS 2006
32		O. C. Akgun, Yusuf Leblebici: Weak inversion performance of CMOS and DCVSPG logic families in sub-300 mV range. ISCAS 2006
31		Derin Derin Harmanci, Nuria Pazos, Paolo Ienne, Yusuf Leblebici: A Predictable Communication Scheme for Embedded Multiprocessor Systems. VLSI-SoC 2006: 152-157
30		Stéphane Badel, Ilhan Hatirnaz, Yusuf Leblebici, Elizabeth J. Brauer: Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells. VLSI-SoC 2006: 234-238
29		Zeynep Toprak Deniz, Yusuf Leblebici, Eric A. Vittoz: Configurable On-Line Global Energy Optimization in Multi-Core Embedded Systems Using Principles of Analog Computation. VLSI-SoC 2006: 379-384
28		Ayse Kivilcim Coskun, Tajana Simunic, Kresimir Mihic, Giovanni De Micheli, Yusuf Leblebici: Analysis and Optimization of MPSoC Reliability. J. Low Power Electronics 2(1): 56-69 (2006)
	2005
27		Sorin Cotofana, Alexandre Schmid, Yusuf Leblebici, Adrian M. Ionescu, Oliver Soffke, Peter Zipf, Manfred Glesner, A. Rubio: CONAN - A Design Exploration Framework for Reliable Nano-Electronics. ASAP 2005: 260-267
26		Paul Muller, Armin Tajalli, Seyed Mojtaba Atarodi, Yusuf Leblebici: Top-Down Design of a Low-Power Multi-Channel 2.5-Gbit/s/Channel Gated Oscillator Clock-Recovery Circuit. DATE 2005: 258-263
25		Soner Yaldiz, Alper Demir, Serdar Tasiran, Paolo Ienne, Yusuf Leblebici: Characterizing and Exploiting Task-Load Variability and Correlation for Energy Management in multi-core systems. ESTImedia 2005: 135-140
24		Paul Muller, Yusuf Leblebici: Jitter Tolerance Analysis of Clock and Data Recovery Circuits. FDL 2005: 143-147
23		Zeynep Toprak Deniz, Yusuf Leblebici: Low-power current mode logic for improved DPA-resistance in embedded systems. ISCAS (2) 2005: 1059-1062
22		Mehmet Derin Harmanci, Nuria Pazos Escudero, Yusuf Leblebici, Paolo Ienne: Quantitative modelling and comparison of communication schemes to guarantee quality-of-service in networks-on-chip. ISCAS (2) 2005: 1782-1785
21		Takahide Oya, Tetsuya Asai, Yoshihito Amemiya, Alexandre Schmid, Yusuf Leblebici: Single-electron circuit for inhibitory spiking neural network with fault-tolerant architecture. ISCAS (3) 2005: 2535-2538
20		Armin Tajalli, Paul Muller, Seyed Mojtaba Atarodi, Yusuf Leblebici: A low-power, multichannel gated oscillator-based CDR for short-haul applications. ISLPED 2005: 107-110
19		Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici: A Methodology for Reliability Enhancement of Nanometer-Scale Digital Systems Based on a-priori Functional Fault- Tolerance Analysis. VLSI-SoC 2005: 111-125
18		Takahide Oya, Alexandre Schmid, Tetsuya Asai, Yusuf Leblebici, Yoshihito Amemiya: On the fault tolerance of a clustered single-electron neural network for differential enhancement. IEICE Electronic Express 2(3): 76-80 (2005)
	2004
17		Elizabeth J. Brauer, Yusuf Leblebici: Low noise MCML prefix adders using 0.18 µm CMOS technology. Circuits, Signals, and Systems 2004: 467-470
16		Elizabeth J. Brauer, Yusuf Leblebici: Sub-70 PS full adder IN 0.18 µm CMOS current-mode logic. Circuits, Signals, and Systems 2004: 483-487
15		Alexandre Schmid, Yusuf Leblebici: A Highly Fault Tolerant PLA Architecture for Failure-Prone Nanometer CMOS and Novel Quantum Device Technologies. DFT 2004: 39-47
14		Alexandre Schmid, Yusuf Leblebici: Robust and fault-tolerant circuit design for nanometer-scale devices and single-electron transistors. ISCAS (3) 2004: 685-688
13		Ilhan Hatirnaz, Yusuf Leblebici: Modelling and implementation of twisted differential on-chip interconnects for crosstalk noise reduction. ISCAS (5) 2004: 185-188
12		Stéphane Badel, Alexandre Schmid, Yusuf Leblebici: Mixed analog-digital image processing circuit based on Hamming artificial neural network architecture. ISCAS (5) 2004: 780-783
11		Alexandre Schmid, Yusuf Leblebici: Robust circuit and system design methodologies for nanometer-scale devices and single-electron transistors. IEEE Trans. VLSI Syst. 12(11): 1156-1166 (2004)
	2003
10		Stéphane Badel, Alexandre Schmid, Yusuf Leblebici: VLSI Realization of a Two-Dimensional Hamming Distance Comparator ANN for Image Processing Applications. ESANN 2003: 445-450
9		Zeynep Toprak Deniz, Yusuf Leblebici: Design and realization of a modular 200 MSample/s 12-bit pipelined A/D converter block using deep-submicron digital CMOS technology. ISCAS (1) 2003: 841-844
8		Turan Demirci, Ilhan Hatirnaz, Yusuf Leblebici: Full-custom CMOS realization of a high-performance binary sorting engine with linear area-time complexity. ISCAS (5) 2003: 453-456
	1999
7		Ilhan Hatirnaz, Frank K. Gürkaynak, Yusuf Leblebici: Realization of a programmable rank-order filter architecture using capacitive threshold logic gates. ISCAS (1) 1999: 435-438
6		Alexandre Schmid, D. Bowler, R. Baumgartner, Yusuf Leblebici: A novel analog-digital flash converter architecture based on capacitive threshold gates. ISCAS (2) 1999: 172-175
	1993
5		Yung-Ho Shih, Yusuf Leblebici, Sung-Mo Kang: ILLIADS: a fast timing and reliability simulator for digital MOS circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 12(9): 1387-1402 (1993)
	1992
4		Yusuf Leblebici, Sung-Mo Kang: Modeling of nMOS transistors for simulation of hot-carrier-induced device and circuit degradation. IEEE Trans. on CAD of Integrated Circuits and Systems 11(2): 235-246 (1992)
	1991
3		Yung-Ho Shih, Yusuf Leblebici, Sung-Mo Kang: New Simulation Methods for MOS VLSI Timing and Reliability. ICCAD 1991: 162-165
2		Carlos H. Díaz, Sung-Mo Kang, Yusuf Leblebici: An accurate analytical delay model for BiCMOS driver circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 10(5): 577-588 (1991)
	1990
1		Yusuf Leblebici, Sung-Mo Kang: An Integrated Hot-Carrier Degradation Simulator for VLSI Reliability Analysis. ICCAD 1990: 400-403

Coauthor Index

1	O. C. Akgun	[32]
2	Massimo Alioto	[44] [46]
3	Yoshihito Amemiya	[18] [21]
4	Tetsuya Asai	[18] [21]
5	Seyed Mojtaba Atarodi	[20] [26] [34] [37]
6	Panagiotis Athanasopoulos	[47] [53] [57]
7	David Atienza	[38] [41] [43] [50] [55] [59] [63]
8	José Luis Ayala (José L. Ayala)	[55] [59]
9	Stéphane Badel	[10] [12] [30] [33] [38] [39] [40] [48] [61]
10	R. Baumgartner	[6]
11	Bahman Kheradmand Boroujeni	[45]
12	Didier Bouvet	[41] [43]
13	D. Bowler	[6]
14	Elizabeth J. Brauer	[16] [17] [30] [33] [44] [46]
15	Philip Brisk	[47] [51] [53] [57] [61]
16	Gianfranco Cerofolini	[62]
17	Alessandro Cevrero	[47] [51] [53] [57] [61]
18	Ayse Kivilcim Coskun	[28] [36] [59]
19	Sorin Cotofana (Sorin Dan Cotofana)	[27]
20	Alper Demir	[25]
21	Turan Demirci	[8]
22	Zeynep Toprak Deniz	[9] [23] [29] [40] [52]
23	Carlos H. Díaz	[2]
24	Thomas Eisenbarth	[40] [52]
25	Nuria Pazos Escudero	[22]
26	Maria Gabrani	[42]
27	Manfred Glesner	[27]
28	Johann Großschädl	[40] [52]
29	Carlotta Guiducci	[49]
30	Erdem Guleyupoglu	[48]
31	Frank K. Gürkaynak	[7] [42] [46] [47] [48] [49] [51] [52] [53]
32	Derin Derin Harmanci	[31]
33	Mehmet Derin Harmanci	[22]
34	Ilhan Hatirnaz	[7] [8] [13] [30] [33] [38]
35	Paolo Ienne	[22] [25] [31] [40] [47] [51] [52] [53] [57] [61]
36	Ozgur Inac	[48]
37	Adrian M. Ionescu	[27] [41] [43]
38	M. Haykel Ben Jamaa	[41] [43] [50] [60] [62] [63]
39	Neil Joye	[54]
40	Sung-Mo Kang	[1] [2] [3] [4] [5]
41	Theo Kluter	[61]
42	Marco Macchetti	[40] [52]
43	Anna Pena Martinez	[48]
44	Giovanni De Micheli	[28] [36] [38] [41] [43] [50] [60] [62] [63]
45	Kresimir Mihic	[28]
46	Kirsten E. Moselund	[41] [43]
47	Paul Muller	[20] [24] [26] [34] [37]
48	Srinivasan Murali	[38]
49	Seyed Hosein Attarzadeh Niaki	[51] [53]
50	Chrysostomos Nicopoulos	[51] [53]
51	Takahide Oya	[18] [21]
52	Christof Paar	[40] [52]
53	Vinod Pangracious	[55]
54	Hadi Parandeh-Afshar	[47] [53] [57]
55	Nuria Pazos	[31] [38]
56	Christian Piguet	[45]
57	Axel Poschmann	[40] [52]
58	Laura Pozzi	[40] [52]
59	Francesco Regazzoni	[40] [52] [61]
60	A. Rubio	[27]
61	Alexandre Schmid	[6] [10] [11] [12] [14] [15] [18] [19] [21] [27] [35] [42] [49] [54] [56] [58]
62	Yung-Ho Shih	[3] [5]
63	Tajana Simunic (Tajana Simunic Rosing)	[28] [36] [59]
64	Maurizio Skerlj	[57]
65	Oliver Soffke	[27]
66	Arvind Sridhar	[55]
67	François-Xavier Standaert	[61]
68	Milos Stanisavljevic	[19] [35] [42] [56] [58]
69	Armin Tajalli	[20] [26] [34] [37] [44] [46]
70	Serdar Tasiran	[25]
71	Ajay K. Verma	[47] [53]
72	Paolo Vietti	[48]
73	Eric A. Vittoz	[29]
74	Soner Yaldiz	[25]
75	Peter Zipf	[27]

Colors in the list of coauthors