Jong Duk Lee

	2009
12		Seongjae Cho, Jung Hoon Lee, Gil Sung Lee, Jong Duk Lee, Hyungcheol Shin, Byung-Gook Park: Design Consideration for Vertical Nonvolatile Memory Device Regarding Gate-Induced Barrier Lowering (GIBL). IEICE Transactions 92-C(5): 620-626 (2009)
11		Jongwook Jeon, Ickhyun Song, Jong Duk Lee, Byung-Gook Park, Hyungcheol Shin: Application of the Compact Channel Thermal Noise Model of Short Channel MOSFETs to CMOS RFIC Design. IEICE Transactions 92-C(5): 627-634 (2009)
10		Sang Hyuk Park, Sangwoo Kang, Seongjae Cho, Dong-Seup Lee, Jung Han Lee, Hong-Seon Yang, Kwon-Chil Kang, Joung-Eob Lee, Jong Duk Lee, Byung-Gook Park: Recessed Channel Dual Gate Single Electron Transistors (RCDG-SETs) for Room Temperature Operation. IEICE Transactions 92-C(5): 647-652 (2009)
9		Yoon Kim, Seongjae Cho, Gil Sung Lee, Il Han Park, Jong Duk Lee, Hyungcheol Shin, Byung-Gook Park: 3-Dimensional Terraced NAND (3D TNAND) Flash Memory-Stacked Version of Folded NAND Array. IEICE Transactions 92-C(5): 653-658 (2009)
8		Doo-Hyun Kim, Il Han Park, Seongjae Cho, Jong Duk Lee, Hyungcheol Shin, Byung-Gook Park: Simulation of Retention Characteristics in Double-Gate Structure Multi-Bit SONOS Flash Memory. IEICE Transactions 92-C(5): 659-663 (2009)
	2008
7		Seongjae Cho, Il Han Park, Jung Hoon Lee, Jang-Gn Yun, Doo-Hyun Kim, Jong Duk Lee, Hyungcheol Shin, Byung-Gook Park: Establishing Read Operation Bias Schemes for 3-D Pillar Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI). IEICE Transactions 91-C(5): 731-735 (2008)
6		Jang-Gn Yun, Il Han Park, Seongjae Cho, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Yoon Kim, Jong Duk Lee, Byung-Gook Park: Characterization of 2-bit Recessed Channel Memory with Lifted-Charge Trapping Node (L-CTN) Scheme. IEICE Transactions 91-C(5): 742-746 (2008)
	2007
5		Jong Pil Kim, Woo Young Choi, Jae Young Song, Seongjae Cho, Sang Wan Kim, Jong Duk Lee, Byung-Gook Park: Design and Simulation of Asymmetric MOSFETs. IEICE Transactions 90-C(5): 978-982 (2007)
4		Seongjae Cho, Jang-Gn Yun, Il Han Park, Jung Hoon Lee, Jong Pil Kim, Jong Duk Lee, Hyungcheol Shin, Byung-Gook Park: Analyses on Current Characteristics of 3-D MOSFET Determined by Junction Doping Profiles for Nonvolatile Memory Devices. IEICE Transactions 90-C(5): 988-993 (2007)
	2004
3		Hyuck In Kwon, In Man Kang, Byung-Gook Park, Jong Duk Lee, Sang Sik Park, Jung Chak Ahn, Yong Hee Lee: Effects of electrical stress on mid-gap interface trap density and capture cross sections in n-MOSFETs characterized by pulsed interface probing measurements. Microelectronics Reliability 44(1): 47-51 (2004)
	2003
2		Woo Young Choi, Jong Duk Lee, Byung-Gook Park: Reverse-order source/drain formation with double offset spacer (RODOS) for CMOS low-power, high-speed and low-noise amplifiers. ISLPED 2003: 189-192
1		Ki-Whan Song, Sang-Hoon Lee, Dae Hwan Kim, Kyung Rok Kim, Jaewoo Kyung, Gwanghyeon Baek, Chun-An Lee, Jong Duk Lee, Byung-Gook Park: Complementary Self-Biased Scheme for the Robust Design of CMOS/SET Hybrid Multi-Valued Logic. ISMVL 2003: 267-272

Coauthor Index

1	Jung Chak Ahn	[3]
2	Gwanghyeon Baek	[1]
3	Seongjae Cho	[4] [5] [6] [7] [8] [9] [10] [12]
4	Woo Young Choi	[2] [5]
5	Jongwook Jeon	[11]
6	In Man Kang	[3]
7	Kwon-Chil Kang	[10]
8	Sangwoo Kang	[10]
9	Dae Hwan Kim	[1]
10	Doo-Hyun Kim	[6] [7] [8]
11	Jong Pil Kim	[4] [5]
12	Kyung Rok Kim	[1]
13	Sang Wan Kim	[5]
14	Yoon Kim	[6] [9]
15	Hyuck In Kwon	[3]
16	Jaewoo Kyung	[1]
17	Chun-An Lee	[1]
18	Dong-Seup Lee	[10]
19	Gil Sung Lee	[6] [9] [12]
20	Joung-Eob Lee	[10]
21	Jung Han Lee	[10]
22	Jung Hoon Lee	[4] [6] [7] [12]
23	Sang-Hoon Lee	[1]
24	Yong Hee Lee	[3]
25	Byung-Gook Park	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
26	Il Han Park	[4] [6] [7] [8] [9]
27	Sang Hyuk Park	[10]
28	Sang Sik Park	[3]
29	Hyungcheol Shin	[4] [7] [8] [9] [11] [12]
30	Ickhyun Song	[11]
31	Jae Young Song	[5]
32	Ki-Whan Song	[1]
33	Hong-Seon Yang	[10]
34	Jang-Gn Yun	[4] [6] [7]