 | 2007 |
|---|
| 8 |       | Gi-Ho Park,
Kil-Whan Lee,
Tack-Don Han,
Shin-Dug Kim:
Cooperative Cache System: A Low Power Cache System for Embedded Processors.
IEICE Transactions 90-C(4): 708-717 (2007) |
| 7 | | Woo-Chan Park,
Cheong-Ghil Kim,
Duk-Ki Yoon,
Kil-Whan Lee,
Il-San Kim,
Tack-Don Han:
A consistency-free memory architecture for sort-last parallel rendering processors.
Journal of Systems Architecture 53(5-6): 272-284 (2007) |
| 2006 |
|---|
| 6 | | Woo-Chan Park,
Duk-Ki Yoon,
Kil-Whan Lee,
Il-San Kim,
Kyung-Su Kim,
Won-Jong Lee,
Tack-Don Han,
Sung-Bong Yang:
A Processor Architecture with Effective Memory System for Sort-Last Parallel Rendering.
ARCS 2006: 160-175 |
| 2005 |
|---|
| 5 | | Kil-Whan Lee,
Woo-Chan Park,
Il-San Kim,
Tack-Don Han:
A pixel cache architecture with selective placement scheme based on z-test result.
Microprocessors and Microsystems 29(1): 41-46 (2005) |
| 2003 |
|---|
| 4 | | Woo-Chan Park,
Kil-Whan Lee,
Il-San Kim,
Tack-Don Han,
Sung-Bong Yang:
An Effective Pixel Rasterization Pipeline Architecture for 3D Rendering Processors.
IEEE Trans. Computers 52(11): 1501-1508 (2003) |
| 2002 |
|---|
| 3 | | Woo-Chan Park,
Kil-Whan Lee,
Il-San Kim,
Tack-Don Han,
Sung-Bong Yang:
A Mid-Texturing Pixel Rasterization Pipeline Architecture for 3D Rendering Processors.
ASAP 2002: 173- |
| 2000 |
|---|
| 2 | | Gi-Ho Park,
Kil-Whan Lee,
Jae-Hyuk Lee,
Tack-Don Han,
Shin-Dug Kim:
A Power Efficient Cache Structure for Embedded Processors Based on the Dual Cache Structure.
LCTES 2000: 162-177 |
| 1 |  | Gi-Ho Park,
Kil-Whan Lee,
Tack-Don Han,
Shin-Dug Kim:
A Dual Data Cache System to Reflect the Principle of Locality Effectively.
PDPTA 2000 |
