 | 2009 |
| 37 |  | Bing-Wei Huang,
Jin-Fu Li:
Efficient diagnosis algorithms for drowsy SRAMs.
ISQED 2009: 276-279 |
| 36 |  | Hsiang-Ning Liu,
Yu-Jen Huang,
Jin-Fu Li:
Memory Built-in Self Test in Multicore Chips with Mesh-Based Networks.
IEEE Micro 29(5): 46-55 (2009) |
| 2008 |
| 35 |  | Hong-Ming Shieh,
Jin-Fu Li:
A Multi-Code Compression Scheme for Test Time Reduction of System-on-Chip Designs.
IEICE Transactions 91-D(10): 2428-2434 (2008) |
| 34 |  | Da-Ming Chang,
Jin-Fu Li,
Yu-Jen Huang:
A Built-In Redundancy-Analysis Scheme for Random Access Memories with Two-Level Redundancy.
J. Electronic Testing 24(1-3): 181-192 (2008) |
| 2007 |
| 33 |  | Tsu-Wei Tseng,
Chun-Hsien Wu,
Yu-Jen Huang,
Jin-Fu Li,
Alex Pao,
Kevin Chiu,
Eliot Chen:
A Built-In Self-Repair Scheme for Multiport RAMs.
VTS 2007: 355-360 |
| 32 |  | Jin-Fu Li,
Tsu-Wei Tseng,
Chin-Long Wey:
An Efficient Transparent Test Scheme for Embedded Word-Oriented Memories
CoRR abs/0710.4747: (2007) |
| 31 |  | Rei-Fu Huang,
Jin-Fu Li,
Jen-Chieh Yeh,
Cheng-Wen Wu:
Raisin: Redundancy Analysis Algorithm Simulation.
IEEE Design & Test of Computers 24(4): 386-396 (2007) |
| 30 |  | Chao-Da Huang,
Jin-Fu Li,
Tsu-Wei Tseng:
ProTaR: An Infrastructure IP for Repairing RAMs in System-on-Chips.
IEEE Trans. VLSI Syst. 15(10): 1135-1143 (2007) |
| 29 |  | Jin-Fu Li:
Transparent-Test Methodologies for Random Access Memories Without/With ECC.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(10): 1888-1893 (2007) |
| 28 |  | Jin-Fu Li:
Testing Ternary Content Addressable Memories With Comparison Faults Using March-Like Tests.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(5): 919-931 (2007) |
| 27 |  | Jin-Fu Li,
Chao-Da Huang:
An Efficient Diagnosis Scheme for RAMs with Simple Functional Faults.
IEICE Transactions 90-A(12): 2703-2711 (2007) |
| 2006 |
| 26 |  | Tsu-Wei Tseng,
Jin-Fu Li,
Da-Ming Chang:
A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmap.
DATE 2006: 53-58 |
| 25 |  | Yu-Jen Huang,
Da-Ming Chang,
Jin-Fu Li:
A Built-In Redundancy-Analysis Scheme for Self-Repairable RAMs with Two-Level Redundancy.
DFT 2006: 362-370 |
| 24 |  | Yu-Jen Huang,
Jin-Fu Li:
Testing Active Neighborhood Pattern-Sensitive Faults of Ternary Content Addressable Memories.
European Test Symposium 2006: 55-62 |
| 2005 |
| 23 |  | Jin-Fu Li:
Testing comparison faults of ternary CAMs based on comparison faults of binary CAMs.
ASP-DAC 2005: 65-70 |
| 22 |  | Jin-Fu Li,
Tsu-Wei Tseng,
Chin-Long Wey:
An Efficient Transparent Test Scheme for Embedded Word-Oriented Memories.
DATE 2005: 574-579 |
| 21 |  | Jin-Fu Li,
Jiunn-Der Yu,
Yu-Jen Huang:
A design methodology for hybrid carry-lookahead/carry-select adders with reconfigurability.
ISCAS (1) 2005: 77-80 |
| 20 |  | Jin-Fu Li,
Chou-Kun Lin:
Modeling and Testing Comparison Faults for Ternary Content Addressable Memories.
VTS 2005: 60-65 |
| 19 |  | Jin-Fu Li,
Jen-Chieh Yeh,
Rei-Fu Huang,
Cheng-Wen Wu:
A built-in self-repair design for RAMs with 2-D redundancy.
IEEE Trans. VLSI Syst. 13(6): 742-745 (2005) |
| 2004 |
| 18 |  | Jin-Fu Li,
Chao-Da Huang:
An Efficient Diagnosis Scheme for Random Access Memories.
Asian Test Symposium 2004: 277-282 |
| 17 |  | Jin-Fu Li,
Chih-Chiang Hsu:
Efficient Test Methodologies for Conditional Sum Adders.
Asian Test Symposium 2004: 319-324 |
| 2003 |
| 16 |  | Jin-Fu Li,
Jen-Chieh Yeh,
Rei-Fu Huang,
Cheng-Wen Wu,
Peir-Yuan Tsai,
Archer Hsu,
Eugene Chow:
A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy.
ITC 2003: 393-402 |
| 15 |  | Rei-Fu Huang,
Li-Ming Denq,
Cheng-Wen Wu,
Jin-Fu Li:
A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories.
MTDT 2003: 53- |
| 14 |  | Chih-Tsun Huang,
Chi-Feng Wu,
Jin-Fu Li,
Cheng-Wen Wu:
Built-in redundancy analysis for memory yield improvement.
IEEE Transactions on Reliability 52(4): 386-399 (2003) |
| 13 |  | Jin-Fu Li,
Ruey-Shing Tzeng,
Cheng-Wen Wu:
Testing and Diagnosis Methodologies for Embedded Content Addressable Memories.
J. Electronic Testing 19(2): 207-215 (2003) |
| 2002 |
| 12 |  | Jin-Fu Li,
Hsin-Jung Huang,
Jeng-Bin Chen,
Chih-Pin Su,
Cheng-Wen Wu,
Chuang Cheng,
Shao-I Chen,
Chi-Yi Hwang,
Hsiao-Ping Lin:
A Hierarchical Test Scheme for System-On-Chip Designs.
DATE 2002: 486-490 |
| 11 |  | Rei-Fu Huang,
Jin-Fu Li,
Jen-Chieh Yeh,
Cheng-Wen Wu:
A Simulator for E aluating Redundancy Analysis Algorithms of Repairable Embedded Memories.
IOLTW 2002: 262- |
| 10 |  | Rei-Fu Huang,
Jin-Fu Li,
Jen-Chieh Yeh,
Cheng-Wen Wu:
A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable Embedded Memories.
MTDT 2002: 68- |
| 9 |  | Jin-Fu Li,
Ruey-Shing Tzeng,
Cheng-Wen Wu:
Testing and Diagnosing Embedded Content Addressable Memories.
VTS 2002: 389-394 |
| 8 |  | Jin-Fu Li,
Hsin-Jung Huang,
Jeng-Bin Chen,
Chih-Pin Su,
Cheng-Wen Wu,
Chuang Cheng,
Shao-I Chen,
Chi-Yi Hwang,
Hsiao-Ping Lin:
A Hierarchical Test Methodology for Systems on Chip.
IEEE Micro 22(5): 69-81 (2002) |
| 7 |  | Jin-Fu Li,
Cheng-Wen Wu:
Efficient FFT network testing and diagnosis schemes.
IEEE Trans. VLSI Syst. 10(3): 267-278 (2002) |
| 6 |  | Jin-Fu Li,
Ruey-Shing Tzeng,
Cheng-Wen Wu:
Diagnostic Data Compression Techniques for Embedded Memories with Built-In Self-Test.
J. Electronic Testing 18(4-5): 515-527 (2002) |
| 5 |  | Chih-Wea Wang,
Chi-Feng Wu,
Jin-Fu Li,
Cheng-Wen Wu,
Tony Teng,
Kevin Chiu,
Hsiao-Ping Lin:
A Built-in Self-Test Scheme with Diagnostics Support for Embedded SRAM.
J. Electronic Testing 18(6): 637-647 (2002) |
| 2001 |
| 4 |  | Jin-Fu Li,
Cheng-Wen Wu:
Memory fault diagnosis by syndrome compression.
DATE 2001: 97-101 |
| 3 |  | Jin-Fu Li,
Kuo-Liang Cheng,
Chih-Tsun Huang,
Cheng-Wen Wu:
March-based RAM diagnosis algorithms for stuck-at and coupling faults.
ITC 2001: 758-767 |
| 2000 |
| 2 |  | Chih-Wea Wang,
Chi-Feng Wu,
Jin-Fu Li,
Cheng-Wen Wu,
Tony Teng,
Kevin Chiu,
Hsiao-Ping Lin:
A built-in self-test and self-diagnosis scheme for embedded SRAM.
Asian Test Symposium 2000: 45-50 |
| 1999 |
| 1 |  | Jin-Fu Li,
Cheng-Wen Wu:
Testable and Fault Tolerant Design for FFT Networks.
DFT 1999: 201-209 |