Katherine Shu-Min Li

	2009
12		Yu-Wei Yang, Katherine Shu-Min Li: Temperature-aware dynamic frequency and voltage scaling for reliability and yield enhancement. ASP-DAC 2009: 49-54
	2008
11		Sying-Jyan Wang, Shih-Cheng Chen, Katherine Shu-Min Li: Design and analysis of skewed-distribution scan chain partition for improved test data compression. ISCAS 2008: 2641-2644
10		Sying-Jyan Wang, Kuo-Lin Peng, Kuang-Cyun Hsiao, Katherine Shu-Min Li: Layout-aware scan chain reorder for launch-off-shift transition test coverage. ACM Trans. Design Autom. Electr. Syst. 13(4): (2008)
	2007
9		Sying-Jyan Wang, Yan-Ting Chen, Katherine Shu-Min Li: Low Capture Power Test Generation for Launch-off-Capture Transition Test Based on Don't-Care Filling. ISCAS 2007: 3683-3686
8		Katherine Shu-Min Li, Yao-Wen Chang, Chung-Len Lee, Chauchin Su, Jwu E. Chen: Multilevel Full-Chip Routing With Testability and Yield Enhancement. IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1625-1636 (2007)
7		Katherine Shu-Min Li, Chung-Len Lee, Chauchin Su, Jwu E. Chen: IEEE Standard 1500 Compatible Oscillation Ring Test Methodology for Interconnect Delay and Crosstalk Detection. J. Electronic Testing 23(4): 341-355 (2007)
	2006
6		Katherine Shu-Min Li, Yao-Wen Chang, Chauchin Su, Chung-Len Lee, Jwu E. Chen: IEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faults. ASP-DAC 2006: 366-371
5		Katherine Shu-Min Li, Chauchin Su, Yao-Wen Chang, Chung-Len Lee, Jwu E. Chen: IEEE Standard 1500 Compatible Interconnect Diagnosis for Delay and Crosstalk Faults. IEEE Trans. on CAD of Integrated Circuits and Systems 25(11): 2513-2525 (2006)
	2005
4		Katherine Shu-Min Li, Chung-Len Lee, Chauchin Su, Jwu E. Chen: Oscillation ring based interconnect test scheme for SOC. ASP-DAC 2005: 184-187
3		Katherine Shu-Min Li, Chung-Len Lee, Tagin Jiang, Chauchin Su, Jwu E. Chen: Finite State Machine Synthesis for At-Speed Oscillation Testability. Asian Test Symposium 2005: 360-365
2		Katherine Shu-Min Li, Chung-Len Lee, Yao-Wen Chang, Chauchin Su, Jwu E. Chen: Multilevel full-chip routing with testability and yield enhancement. SLIP 2005: 29-36
	2004
1		Katherine Shu-Min Li, Chung-Len Lee, Chauchin Su, Jwu E. Chen: A Unified Approach to Detecting Crosstalk Faults of Interconnects in Deep Sub-Micron VLSI. Asian Test Symposium 2004: 145-150

Coauthor Index

1	Yao-Wen Chang	[2] [5] [6] [8]
2	Jwu E. Chen	[1] [2] [3] [4] [5] [6] [7] [8]
3	Shih-Cheng Chen	[11]
4	Yan-Ting Chen	[9]
5	Kuang-Cyun Hsiao	[10]
6	Tagin Jiang	[3]
7	Chung-Len Lee	[1] [2] [3] [4] [5] [6] [7] [8]
8	Kuo-Lin Peng	[10]
9	Chauchin Su	[1] [2] [3] [4] [5] [6] [7] [8]
10	Sying-Jyan Wang	[9] [10] [11]
11	Yu-Wei Yang	[12]

Colors in the list of coauthors