 | 2009 |
|---|
| 14 |       | Ke-Ren Dai,
Wen-Hao Liu,
Yih-Lang Li:
Efficient simulated evolution based rerouting and congestion-relaxed layer assignment on 3-D global routing.
ASP-DAC 2009: 570-575 |
| 13 | | Yen-Hung Lin,
Shu-Hsin Chang,
Yih-Lang Li:
Critical-trunk based obstacle-avoiding rectilinear steiner tree routings for delay and slack optimization.
ISPD 2009: 151-158 |
| 12 | | Peng-Yang Hung,
Ying-Shu Lou,
Yih-Lang Li:
Minimum Shield Insertion on Full-Chip RLC Crosstalk Budgeting Routing.
IEICE Transactions 92-A(3): 880-889 (2009) |
| 2008 |
|---|
| 11 | | Yu-Ning Chang,
Yih-Lang Li,
Wei-Tin Lin,
Wen-Nai Cheng:
Non-slicing floorplanning-based crosstalk reduction on gridless track assignment for a gridless routing system with fast pseudo-tile extraction.
ISPD 2008: 134-141 |
| 10 | | Peng-Yang Hung,
Ying-Shu Lou,
Yih-Lang Li:
Minimum Shield Insertion on Full-Chip RLC Crosstalk Budgeting Routing.
ISQED 2008: 514-519 |
| 9 | | Yiming Li,
Shao-Ming Yu,
Yih-Lang Li:
Parallel solution of large-scale eigenvalue problem for master equation in protein folding dynamics.
J. Parallel Distrib. Comput. 68(5): 678-685 (2008) |
| 8 | | Yiming Li,
Shao-Ming Yu,
Yih-Lang Li:
Electronic design automation using a unified optimization framework.
Mathematics and Computers in Simulation 79(4): 1137-1152 (2008) |
| 7 | | Yiming Li,
Yih-Lang Li,
Shao-Ming Yu:
Design optimization of a current mirror amplifier integrated circuit using a computational statistics technique.
Mathematics and Computers in Simulation 79(4): 1165-1177 (2008) |
| 2007 |
|---|
| 6 | | Yiming Li,
Shao-Ming Yu,
Yih-Lang Li:
A Simulation-Based Hybrid Optimization Technique for Low Noise Amplifier Design Automation.
International Conference on Computational Science (4) 2007: 259-266 |
| 5 | | Yih-Lang Li,
Jin-Yih Li,
Wen-Bin Chen:
An Efficient Tile-Based ECO Router Using Routing Graph Reduction and Enhanced Global Routing Flow.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(2): 345-358 (2007) |
| 4 | | Yih-Lang Li,
Hsin-Yu Chen,
Chih-Ta Lin:
NEMO: A New Implicit-Connection-Graph-Based Gridless Router With Multilayer Planes and Pseudo Tile Propagation.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 705-718 (2007) |
| 2005 |
|---|
| 3 | | Jin-Yih Li,
Yih-Lang Li:
An efficient tile-based ECO router with routing graph reduction and enhanced global routing flow.
ISPD 2005: 7-13 |
| 1995 |
|---|
| 2 | | Yih-Lang Li,
Cheng-Wen Wu:
Cellular automata for efficient parallel logic and fault simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(6): 740-749 (1995) |
| 1994 |
|---|
| 1 |  | Yih-Lang Li,
Cheng-Wen Wu:
Logic and Fault Simulation by Cellular Automata.
EDAC-ETC-EUROASIC 1994: 552-556 |
