| 2008 |
|---|
| 61 | EE | Shan Yan,
Bill Lin:
Application-specific Network-on-Chip architecture synthesis based on set partitions and Steiner Trees.
ASP-DAC 2008: 277-282 |
| 2007 |
|---|
| 60 | EE | Bill Lin,
Isaac Keslassy:
Frame-aggregated concurrent matching switch.
ANCS 2007: 107-116 |
| 59 | EE | Bill Lin,
Wai-Shing Ho,
Ben Kao,
Chun Kit Chui:
Adaptive Frequency Counting over Bursty Data Streams.
CIDM 2007: 516-523 |
| 58 | EE | Hao Wang,
Bill Lin:
Pipelined van Emde Boas Tree: Algorithms, Analysis, and Applications.
INFOCOM 2007: 2471-2475 |
| 57 | EE | Shan Yan,
Bill Lin:
Stream execution on wide-issue clustered VLIW architectures.
LCTES 2007: 158-160 |
| 56 | EE | Bill Lin:
Compiling concurrent programs for embedded sequential execution.
Integration 40(2): 106-117 (2007) |
| 2006 |
|---|
| 55 | EE | Hao Wang,
Bill Lin:
On the Efficient Implementation of Pipelined Heaps for Network Processing.
GLOBECOM 2006 |
| 54 | EE | Bill Lin,
Isaac Keslassy:
The Concurrent Matching Switch Architecture.
INFOCOM 2006 |
| 2005 |
|---|
| 53 | EE | Bill Lin,
Isaac Keslassy:
A Scalable Switch for Service Guarantees.
Hot Interconnects 2005: 93-99 |
| 52 | EE | Stefano Santi,
Bill Lin,
Ljupco Kocarev,
Gian Mario Maggio,
Riccardo Rovatti,
Gianluca Setti:
On the impact of traffic statistics on quality of service for networks on chip.
ISCAS (3) 2005: 2349-2352 |
| 2000 |
|---|
| 51 | | Ranjita Bhagwan,
Bill Lin:
Design of High-Speed Packet Switch with Fine-Grained Quality-of-Service Guarantees.
ICC (3) 2000: 1430-1434 |
| 50 | EE | Ranjita Bhagwan,
Bill Lin:
Fast and Scalable Priority Queue Architecture for High-Speed Network Switches.
INFOCOM 2000: 538-547 |
| 1999 |
|---|
| 49 | EE | Xiaohan Zhu,
Bill Lin:
Hardware Compilation for FPGA-Based Configurable Computing Machines.
DAC 1999: 697-702 |
| 48 | EE | Xiaohan Zhu,
Bill Lin:
Compositional Software Synthesis of Communicating Processes.
ICCD 1999: 646-651 |
| 1998 |
|---|
| 47 | EE | Bill Lin:
Software Synthesis of Process-Based Concurrent Programs.
DAC 1998: 502-505 |
| 46 | EE | Bill Lin:
Efficient Compilation of Process-Based Concurrent Programs without Run-Time Scheduling.
DATE 1998: 211-217 |
| 45 | EE | Steven Vercauteren,
Diederik Verkest,
Gjalt G. de Jong,
Bill Lin:
Efficient Verification using Generalized Partial Order Analysis.
DATE 1998: 782-789 |
| 44 | EE | Kenneth Y. Yun,
Bill Lin,
David L. Dill,
Srinivas Devadas:
BDD-based synthesis of extended burst-mode controllers.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(9): 782-792 (1998) |
| 1997 |
|---|
| 43 | EE | Julio Leao da Silva Jr.,
Chantal Ykman-Couvreur,
Bill Lin,
Hugo De Man,
Gjalt G. de Jong:
A System Design Methodology for Telecommunication Network Applications.
Great Lakes Symposium on VLSI 1997: 64-69 |
| 42 | EE | Steven Vercauteren,
Diederik Verkest,
Gjalt G. de Jong,
Bill Lin:
Derivation of Formal Representations from Process-Based Specification and Implementation Models.
ISSS 1997: 16- |
| 41 | EE | Milton H. Sawasaki,
Chantal Ykman-Couvreur,
Bill Lin:
Externally hazard-free implementations of asynchronous control circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(8): 835-848 (1997) |
| 1996 |
|---|
| 40 | EE | Bill Lin,
Steven Vercauteren,
Hugo De Man:
Embedded Architecture Co-Synthesis and System Integration.
CODES 1996: 2-9 |
| 39 | EE | Steven Vercauteren,
Bill Lin,
Hugo De Man:
Constructing Application-Specific Heterogeneous Embedded Architectures from Custom HW/SW Applications.
DAC 1996: 521-526 |
| 38 | EE | Eric Verlind,
Gjalt G. de Jong,
Bill Lin:
Efficient Partial Enumeration for Timing Analysis of Asynchronous Systems.
DAC 1996: 55-58 |
| 37 | EE | Bill Lin:
A System Design Methodology for Software/Hardware Co-Development of Telecommunication Network Applications.
DAC 1996: 672-677 |
| 36 | EE | Steven Vercauteren,
Bill Lin,
Hugo De Man:
A Strategy for Real-Time Kernel Support in Application-Specific HW/SW Embedded Architectures.
DAC 1996: 678-683 |
| 35 | EE | Sven Wuytack,
Francky Catthoor,
Gjalt G. de Jong,
Bill Lin,
Hugo De Man:
Flow Graph Balancing for Minimizing the Required Memory Bandwidth.
ISSS 1996: 127-132 |
| 34 | EE | Chi-Ying Tsui,
José C. Monteiro,
Massoud Pedram,
Srinivas Devadas,
Alvin M. Despain,
Bill Lin:
Correction to "Power Estimation Methods for Sequential Logic Circuits" [Correspondence].
IEEE Trans. VLSI Syst. 4(4): 495 (1996) |
| 1995 |
|---|
| 33 | EE | Robert M. Fuhrer,
Bill Lin,
Steven M. Nowick:
Algorithms for the optimal state assignment of asynchronous state machines.
ARVLSI 1995: 59-75 |
| 32 | EE | Chantal Ykman-Couvreur,
Bill Lin:
Optimised state assignment for asynchronous circuit synthesis.
ASYNC 1995: 118-127 |
| 31 | EE | Bill Lin,
Gjalt G. de Jong,
Tilman Kolks:
Hierarchical Optimization of Asynchronous Circuits.
DAC 1995: 712-717 |
| 30 | EE | Milton H. Sawasaki,
Chantal Ykman-Couvreur,
Bill Lin:
Externally Hazard-Free Implementations of Asynchronous Circuits.
DAC 1995: 718-724 |
| 29 | EE | Gjalt G. de Jong,
Bill Lin,
Carl Verdonck,
Sven Wuytack,
Francky Catthoor:
Background memory management for dynamic data structure intensive processing systems.
ICCAD 1995: 515-520 |
| 28 | EE | Robert M. Fuhrer,
Bill Lin,
Steven M. Nowick:
Symbolic hazard-free minimization and encoding of asynchronous finite state machines.
ICCAD 1995: 604-611 |
| 27 | EE | Chantal Ykman-Couvreur,
Bill Lin:
Efficient state assignment framework for asynchronous state graphs.
ICCD 1995: 692- |
| 26 | EE | Chi-Ying Tsui,
José C. Monteiro,
Massoud Pedram,
Srinivas Devadas,
Alvin M. Despain,
Bill Lin:
Power estimation methods for sequential logic circuits.
IEEE Trans. VLSI Syst. 3(3): 404-416 (1995) |
| 25 | EE | Bill Lin,
Srinivas Devadas:
Synthesis of hazard-free multilevel logic under multiple-input changes from binary decision diagrams.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(8): 974-985 (1995) |
| 1994 |
|---|
| 24 | EE | José C. Monteiro,
Srinivas Devadas,
Bill Lin:
A Methodology for Efficient Estimation of Switching Activity in Sequential Logic Circuits.
DAC 1994: 12-17 |
| 23 | EE | Gjalt G. de Jong,
Bill Lin:
A Communicating Petri Net Model for the Design of Concurrent Asynchronous Modules.
DAC 1994: 49-55 |
| 22 | EE | Alex Kondratyev,
Michael Kishinevsky,
Bill Lin,
Peter Vanbekbergen,
Alexandre Yakovlev:
Basic Gate Implementation of Speed-Independent Circuits.
DAC 1994: 56-62 |
| 21 | EE | Eric Verlind,
Tilman Kolks,
Gjalt G. de Jong,
Bill Lin,
Hugo De Man:
A Time Abstraction Method for Efficient Verification of Communicating Systems.
DAC 1994: 609-614 |
| 20 | | Peter Vanbekbergen,
Chantal Ykman-Couvreur,
Bill Lin,
Hugo De Man:
A Generalized Signal Transition Graph Model for Specification of Complex Interfaces.
EDAC-ETC-EUROASIC 1994: 378-384 |
| 19 | EE | Bill Lin,
Chantal Ykman-Couvreur,
Peter Vanbekbergen:
A general state graph transformation framework for asynchronous synthesis.
EURO-DAC 1994: 448-453 |
| 18 | EE | Bill Lin,
Steven Vercauteren:
Synthesis of concurrent system interface modules with automatic protocol conversion generation.
ICCAD 1994: 101-108 |
| 17 | EE | Gert Goossens,
Ivo Bolsens,
Bill Lin,
Francky Catthoor:
Design of heterogeneous ICs for mobile and personal communication systems.
ICCAD 1994: 524-531 |
| 16 | EE | Bill Lin,
Srinivas Devadas:
Synthesis of hazard-free multi-level logic under multiple-input changes from binary decision diagrams.
ICCAD 1994: 542-549 |
| 15 | EE | Kenneth Y. Yun,
Bill Lin,
David L. Dill,
Srinivas Devadas:
Performance-driven synthesis of asynchronous controllers.
ICCAD 1994: 550-557 |
| 1993 |
|---|
| 14 | EE | Tilman Kolks,
Bill Lin,
Hugo De Man:
Sizing and verification of communication buffers for communicating processes.
ICCAD 1993: 660-664 |
| 13 | | Bill Lin,
Hugo De Man:
Low-Power Driven Technology Mapping under Timing Constraints.
ICCD 1993: 421-427 |
| 12 | | Bill Lin:
Efficient Symbolic Support Manipulation.
ICCD 1993: 513-516 |
| 1992 |
|---|
| 11 | EE | Bill Lin,
Olivier Coudert,
Jean Christophe Madre:
Symbolic Prime Generation for Multiple-Valued Functions.
DAC 1992: 40-44 |
| 10 | EE | Peter Vanbekbergen,
Bill Lin,
Gert Goossens,
Hugo De Man:
A generalized state assignment theory for transformation on signal transition graphs.
ICCAD 1992: 112-117 |
| 9 | EE | Takayasu Sakurai,
Bill Lin,
A. Richard Newton:
Fast simulated diffusion: an optimization algorithm for multiminimum problems and its application to MOSFET model parameter extraction.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(2): 228-234 (1992) |
| 1991 |
|---|
| 8 | | Bill Lin,
A. Richard Newton:
Implicit Manipulation of Equivalence Classes Using Binary Decision Diagrams.
ICCD 1991: 81-85 |
| 7 | | Bill Lin,
A. Richard Newton:
Exact Redundant State Registers Removal Based on Binary Decision Diagrams.
VLSI 1991: 277-286 |
| 6 | EE | Xuejun Du,
Gary D. Hachtel,
Bill Lin,
A. Richard Newton:
MUSE: a multilevel symbolic encoding algorithm for state assignment.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(1): 28-38 (1991) |
| 1990 |
|---|
| 5 | | Hervé J. Touati,
Hamid Savoj,
Bill Lin,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
Implicit State Enumeration of Finite State Machines Using BDDs.
ICCAD 1990: 130-133 |
| 4 | | Bill Lin,
Hervé J. Touati,
A. Richard Newton:
Don't Care Minimization of Multi-Level Sequential Logic Networks.
ICCAD 1990: 414-417 |
| 3 | | Bill Lin,
Fabio Somenzi:
Minimization of Symbolic Relations.
ICCAD 1990: 88-91 |
| 2 | EE | Bill Lin,
A. Richard Newton:
A circuit disassembly technique for synthesizing symbolic layouts from mask descriptions.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(9): 959-969 (1990) |
| 1987 |
|---|
| 1 | EE | Bill Lin,
A. Richard Newton:
KAHLUA: A Hierarchical Circuit Disassembler.
DAC 1987: 311-317 |
