Cheng-Hung Lin Coauthor index DBLP Vis pubzone.org

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DBLP keys2009
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLCheng-Hung Lin, Hsien-Sheng Hsiao: Hierarchical state machine architecture for regular expression pattern matching. ACM Great Lakes Symposium on VLSI 2009: 133-136
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLXin-Yu Shih, Cheng-Zhou Zhan, Cheng-Hung Lin, An-Yeu Wu: A 52-mW 8.29mm2 19-mode LDPC decoder chip for mobile WiMAX applications. ASP-DAC 2009: 121-122
2008
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLCheng-Hung Lin, Chun-Yu Chen, An-Yeu Wu: Low-power traceback MAP decoding for double-binary convolutional turbo decoder. ISCAS 2008: 736-739
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChun-Yu Chen, Cheng-Hung Lin, An-Yeu Wu: High-throughput dual-mode single/double binary map processor design for wireless wan. SiPS 2008: 83-87
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLFan-Min Li, Cheng-Hung Lin, An-Yeu Wu: Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel. IEEE Trans. VLSI Syst. 16(10): 1358-1371 (2008)
2007
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLCheng-Hung Lin, Yu-Tang Tai, Shih-Chieh Chang: Optimization of pattern matching algorithm for memory based architecture. ANCS 2007: 11-16
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYu-Min Kuo, Cheng-Hung Lin, Chun-Yao Wang, Shih-Chieh Chang, Pei-Hsin Ho: Intelligent Random Vector Generator Based on Probability Analysis of Circuit Structure. ISQED 2007: 344-349
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLCheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang, Shih-Chieh Chang: Optimization of Pattern Matching Circuits for Regular Expression on FPGA. IEEE Trans. VLSI Syst. 15(12): 1303-1310 (2007)
2006
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLCheng-Hung Lin, Chih-Tsun Huang, Chang-Ping Jiang, Shih-Chieh Chang: Optimization of regular expression pattern matching circuits on FPGA. DATE Designers' Forum 2006: 12-17
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLFan-Min Li, Cheng-Hung Lin, An-Yeu Wu: A New Early Termination Scheme of Iterative Turbo Decoding Using Decoding Threshold. SiPS 2006: 89-94
2005
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLCheng-Hung Lin, Yung-Chang Huang, Shih-Chieh Chang, Wen-Ben Jone: Design and design automation of rectification logic for engineering change. ASP-DAC 2005: 1006-1009
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTsung-Han Tsai, Cheng-Hung Lin, An-Yeu Wu: A memory-reduced log-MAP kernel for turbo decoder. ISCAS (2) 2005: 1032-1035

Coauthor Index

1Shih-Chieh Chang [2] [4] [5] [6] [7]
2Chun-Yu Chen [9] [10]
3Pei-Hsin Ho [6]
4Hsien-Sheng Hsiao [12]
5Chih-Tsun Huang [4] [5]
6Yung-Chang Huang [2]
7Chang-Ping Jiang [4] [5]
8Wen-Ben Jone [2]
9Yu-Min Kuo [6]
10Fan-Min Li [3] [8]
11Xin-Yu Shih [11]
12Yu-Tang Tai [7]
13Tsung-Han Tsai [1]
14Chun-Yao Wang [6]
15An-Yeu Wu [1] [3] [8] [9] [10] [11]
16Cheng-Zhou Zhan [11]

Colors in the list of coauthors

Copyright © Tue Dec 1 12:01:14 2009 by Michael Ley (ley@uni-trier.de)