Hung-Jen Lin

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1997

1 Chieh-Yuan Chao, Hung-Jen Lin, L. Miler: Optimal testing of VLSI analog circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 16(1): 58-77 (1997)

	1997
1		Chieh-Yuan Chao, Hung-Jen Lin, L. Miler: Optimal testing of VLSI analog circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 16(1): 58-77 (1997)

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