| 2009 | ||
|---|---|---|
| 5 | Karthikeyan Lingasubramanian, Sanjukta Bhanja: An Error Model to Study the Behavior of Transient Errors in Sequential Circuits. VLSI Design 2009: 485-490 | |
| 4 | Karthikeyan Lingasubramanian, Syed M. Alam, Sanjukta Bhanja: Study of Circuit-Specific Error Bounds for Fault-Tolerant Computation using Maximum a posteriori (MAP) Hypothesis CoRR abs/0906.3282: (2009) | |
| 2007 | ||
| 3 | Karthikeyan Lingasubramanian, Sanjukta Bhanja: Probabilistic maximum error modeling for unreliable logic circuits. ACM Great Lakes Symposium on VLSI 2007: 223-226 | |
| 2006 | ||
| 2 | Sanjukta Bhanja, Karthikeyan Lingasubramanian, N. Ranganathan: A stimulus-free graphical probabilistic switching model for sequential circuits using dynamic bayesian networks. ACM Trans. Design Autom. Electr. Syst. 11(3): 773-796 (2006) | |
| 2005 | ||
| 1 | Sanjukta Bhanja, Karthikeyan Lingasubramanian, N. Ranganathan: Estimation of Switching Activity in Sequential Circuits Using Dynamic Bayesian Networks. VLSI Design 2005: 586-591 | |
| 1 | Syed M. Alam | [4] |
| 2 | Sanjukta Bhanja | [1] [2] [3] [4] [5] |
| 3 | N. Ranganathan (Nagarajan Ranganathan) | [1] [2] |