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DBLP keys2008
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDavid Walter, Scott Little, Chris J. Myers, Nicholas Seegmiller, Tomohiro Yoneda: Verification of Analog/Mixed-Signal Circuits Using Symbolic Methods. IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2223-2235 (2008)
2007
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDavid Walter, Scott Little, Nicholas Seegmiller, Chris J. Myers, Tomohiro Yoneda: Symbolic Model Checking of Analog/Mixed-Signal Circuits. ASP-DAC 2007: 316-323
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLScott Little, David Walter, Kevin Jones, Chris J. Myers: Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces. ATVA 2007: 114-128
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDavid Walter, Scott Little, Chris J. Myers: Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver. ATVA 2007: 66-81
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLScott Little, Alper Sen, Chris J. Myers: Application of Automated Model Generation Techniques to Analog/Mixed-Signal Circuits. MTV 2007: 109-115
2006
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLScott Little, Nicholas Seegmiller, David Walter, Chris J. Myers, Tomohiro Yoneda: Verification of analog/mixed-signal circuits using labeled hybrid petri nets. ICCAD 2006: 275-282
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChris J. Myers, Reid R. Harrison, David Walter, Nicholas Seegmiller, Scott Little: The Case for Analog Circuit Verification. Electr. Notes Theor. Comput. Sci. 153(3): 53-63 (2006)
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHao Zheng, Chris J. Myers, David Walter, Scott Little, Tomohiro Yoneda: Verification of timed circuits with failure-directed abstractions. IEEE Trans. on CAD of Integrated Circuits and Systems 25(3): 403-412 (2006)
2004
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLScott Little, David Walter, Nicholas Seegmiller, Chris J. Myers, Tomohiro Yoneda: Verification of Analog and Mixed-Signal Circuits Using Timed Hybrid Petri Nets. ATVA 2004: 426-440
2003
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHao Zheng, Chris J. Myers, David Walter, Scott Little, Tomohiro Yoneda: Verification of Timed Circuits with Failure Directed Abstractions. ICCD 2003: 28-35
2001
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLChris Winstead, Jie Dai, Woo Jin Kim, Scott Little, Yong-Bin Kim, Chris J. Myers, Christian Schlegel: Analog MAP Decoder for (8, 4) Hamming Code in Subthreshold CMOS. ARVLSI 2001: 132-147
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMartin Van De Bovenkamp, Ruben Jongkind, Gu Van Rhijn, Frans M. van Eijnatten, Gudela Grote, Jouni Lehtelä, Timo Leskinen, Peter Vink, Scott Little, Toni Wäfler: The E/S Tool IT-Support for Ergonomic and Sociotechnical System Design. ER (Workshops) 2001: 67-80

Coauthor Index

1Martin Van De Bovenkamp [1]
2Jie Dai [2]
3Frans M. van Eijnatten [1]
4Gudela Grote [1]
5Reid R. Harrison [6]
6Kevin Jones [10]
7Ruben Jongkind [1]
8Woo Jin Kim [2]
9Yong-Bin Kim [2]
10Jouni Lehtelä [1]
11Timo Leskinen [1]
12Chris J. Myers [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
13Gu Van Rhijn [1]
14Christian Schlegel [2]
15Nicholas Seegmiller [4] [6] [7] [11] [12]
16Alper Sen [8]
17Peter Vink [1]
18Toni Wäfler [1]
19David Walter [3] [4] [5] [6] [7] [9] [10] [11] [12]
20Chris Winstead [2]
21Tomohiro Yoneda [3] [4] [5] [7] [11] [12]
22Hao Zheng [3] [5]

Colors in the list of coauthors

Copyright © Fri Nov 27 15:43:12 2009 by Michael Ley (ley@uni-trier.de)