Victor Lomné

	2009
2		Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans: Evaluation on FPGA of triple rail logic robustness against DPA and DEMA. DATE 2009: 634-639
	2008
1		Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert: Evaluating the robustness of secure triple track logic through prototyping. SBCCI 2008: 193-198

Coauthor Index

1	Ney Laert Vilar Calazans (Ney Calazans)	[1] [2]
2	Philippe Maurine	[1] [2]
3	Michel Robert	[1] [2]
4	Rafael Soares	[1] [2]
5	Lionel Torres	[1] [2]