 | 2009 |
|---|
| 4 |       | Jiang Long,
Andrew Seawright,
Paparao Kavalipati:
Multi-clock SVA synthesis without re-writing.
ASP-DAC 2009: 648-653 |
| 2007 |
|---|
| 3 | | Jiang Long,
Andrew Seawright:
Synthesizing SVA Local Variables for Formal Verification.
DAC 2007: 75-80 |
| 2001 |
|---|
| 2 | | Dong Wang,
Pei-Hsin Ho,
Jiang Long,
James H. Kukula,
Yunshan Zhu,
Hi-Keung Tony Ma,
Robert F. Damiano:
Formal Property Verification by Abstraction Refinement with Formal, Simulation and Hybrid Engines.
DAC 2001: 35-40 |
| 2000 |
|---|
| 1 |  | Pei-Hsin Ho,
Thomas R. Shiple,
Kevin Harer,
James H. Kukula,
Robert F. Damiano,
Valeria Bertacco,
Jerry Taylor,
Jiang Long:
Smart Simulation Using Collaborative Formal and Simulation Engines.
ICCAD 2000: 120-126 |
