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DBLP keys2007
13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJiong Luo, Niraj K. Jha, Li-Shiuan Peh: Simultaneous Dynamic Voltage Scaling of Processors and Communication Links in Real-Time Distributed Embedded Systems. IEEE Trans. VLSI Syst. 15(4): 427-437 (2007)
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJiong Luo, Niraj K. Jha: Power-Efficient Scheduling for Heterogeneous Distributed Real-Time Embedded Systems. IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1161-1170 (2007)
2005
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLe Yan, Jiong Luo, Niraj K. Jha: Joint dynamic voltage scaling and adaptive body biasing for heterogeneous distributed real-time embedded systems. IEEE Trans. on CAD of Integrated Circuits and Systems 24(7): 1030-1041 (2005)
2004
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJiong Luo, Lin Zhong, Yunsi Fei, Niraj K. Jha: Register binding-based RTL power management for control-flow intensive designs. IEEE Trans. on CAD of Integrated Circuits and Systems 23(8): 1175-1183 (2004)
2003
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWeidong Wang, Tat Kee Tan, Jiong Luo, Yunsi Fei, Li Shang, Keith S. Vallerio, Lin Zhong, Anand Raghunathan, Niraj K. Jha: A comprehensive high-level synthesis system for control-flow intensive behaviors. ACM Great Lakes Symposium on VLSI 2003: 11-14
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJiong Luo, Li-Shiuan Peh, Niraj K. Jha: Simultaneous Dynamic Voltage Scaling of Processors and Communication Links in Real-Time Distributed Embedded Systems. DATE 2003: 11150-11151
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLe Yan, Jiong Luo, Niraj K. Jha: Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems. ICCAD 2003: 30-38
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJiong Luo, Niraj K. Jha: Power-profile Driven Variable Voltage Sealing for Heterogeneous Distributed Real-time Embedded Systems. VLSI Design 2003: 369-375
2002
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJiong Luo, Niraj K. Jha: Low Power Distributed Embedded Systems: Dynamic Voltage Scaling and Synthesis. HiPC 2002: 679-692
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLin Zhong, Jiong Luo, Yunsi Fei, Niraj K. Jha: Register Binding Based Power Management for High-level Synthesis of Control-Flow Intensive Behaviors. ICCD 2002: 391-394
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJiong Luo, Niraj K. Jha: Static and Dynamic Variable Voltage Scheduling Algorithms for Real-Time Heterogeneous Distributed Embedded Systems. VLSI Design 2002: 719-
2001
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJiong Luo, Niraj K. Jha: Battery-Aware Static Scheduling for Distributed Real-Time Embedded Systems. DAC 2001: 444-449
2000
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJiong Luo, Niraj K. Jha: Power-Conscious Joint Scheduling of Periodic Task Graphs and Aperiodic Tasks in Distributed Real-Time Embedded Systems. ICCAD 2000: 357-364

Coauthor Index

1Yunsi Fei [4] [9] [10]
2Niraj K. Jha [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
3Li-Shiuan Peh [8] [13]
4Anand Raghunathan [9]
5Li Shang [9]
6Tat Kee Tan [9]
7Keith S. Vallerio [9]
8Weidong Wang [9]
9Le Yan [7] [11]
10Lin Zhong [4] [9] [10]

Copyright © Fri Dec 4 16:04:45 2009 by Michael Ley (ley@uni-trier.de)