Sudipta Mahapatra Coauthor index DBLP Vis pubzone.org

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DBLP keys2007
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJ. Jyotheswar, Sudipta Mahapatra: Efficient FPGA implementation of DWT and modified SPIHT for lossless image compression. Journal of Systems Architecture 53(7): 369-378 (2007)
2001
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRiad Stefo, Jose Luis Nunez, Claudia Feregrino, Sudipta Mahapatra, Simon Jones: FPGA-Based Modelling Unit for High Speed Lossless Arithmetic Coding. FPL 2001: 643-647
2000
4no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSudipta Mahapatra, Rabi N. Mahapatra: Mapping of Neural Network Models onto Systolic Arrays. J. Parallel Distrib. Comput. 60(6): 677-689 (2000)
1999
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSudipta Mahapatra, Rabi N. Mahapatra, Biswanath N. Chatterji: Mapping of neural network models onto massively parallel hierarchical computer systems. Journal of Systems Architecture 45(11): 919-929 (1999)
1997
2no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSudipta Mahapatra, Rabi N. Mahapatra, B. N. Chatterji: A Parallel Formulation of Back-Propagation Learning on Distributed Memory Multiprocessors. Parallel Computing 22(12): 1661-1675 (1997)
1996
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRabi N. Mahapatra, Sudipta Mahapatra: Mapping of Neural Network Models Onto Two-Dimensional Processor Arrays. Parallel Computing 22(10): 1345-1357 (1996)

Coauthor Index

1Biswanath N. Chatterji (B. N. Chatterji) [2] [3]
2Simon Jones [5]
3J. Jyotheswar [6]
4Rabi N. Mahapatra [1] [2] [3] [4]
5Jose Luis Nunez [5]
6Riad Stefo [5]
7Claudia Feregrino Uribe (Claudia Feregrino) [5]

Colors in the list of coauthors

Copyright © Tue Dec 1 12:01:14 2009 by Michael Ley (ley@uni-trier.de)