Ananta K. Majhi

	2009
19		Lavanya Jagan, Ratan Deep Singh, V. Kamakoti, Ananta K. Majhi: Efficient Grouping of Fail Chips for Volume Yield Diagnostics. VLSI Design 2009: 97-102
	2007
18		Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi: Diagnosis of Bridging Defects Based on Current Signatures at Low Power Supply Voltages. VTS 2007: 145-150
17		Rosa Rodríguez-Montañés, Daniel Arumí, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi: Diagnosis of Full Open Defects in Interconnecting Lines. VTS 2007: 158-166
16		Bram Kruseman, Ananta K. Majhi, Guido Gronthoud: On Performance Testing with Path Delay Patterns. VTS 2007: 29-34
15		Ananta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen: Memory Testing Under Different Stress Conditions: An Industrial Evaluation CoRR abs/0710.4693: (2007)
14		Jing Wang, Duncan M. Hank Walker, Xiang Lu, Ananta K. Majhi, Bram Kruseman, Guido Gronthoud, Luis Elvira Villagra, Paul J. A. M. van de Wiel, Stefan Eichenberger: Modeling Power Supply Noise in Delay Testing. IEEE Design & Test of Computers 24(3): 226-234 (2007)
	2005
13		Ananta K. Majhi, Mohamed Azimane, Guido Gronthoud, Maurice Lousberg, Stefan Eichenberger, Fred Bowen: Memory Testing Under Different Stress Conditions: An Industrial Evaluation. DATE 2005: 438-443
12		Mohamed Azimane, Ananta K. Majhi, Guido Gronthoud, Maurice Lousberg: A New Algorithm for Dynamic Faults Detection in RAMs. VTS 2005: 177-182
	2004
11		Bram Kruseman, Ananta K. Majhi, Guido Gronthoud, Stefan Eichenberger: On Hazard-free Patterns for Fine-delay Fault Testing. ITC 2004: 213-222
10		Bram Kruseman, Ananta K. Majhi, Camelia Hora, Stefan Eichenberger, Johan Meirlevede: Systematic Defects in Deep Sub-Micron Technologies. ITC 2004: 290-299
9		Mohamed Azimane, Ananta K. Majhi: New Test Methodology for Resistive Open Defect Detection in Memory Address Decoders. VTS 2004: 123-128
	2003
8		Ananta K. Majhi, Guido Gronthoud, Camelia Hora, Maurice Lousberg, Pop Valer, Stefan Eichenberger: Improving Diagnostic Resolution of Delay Faults using Path Delay Fault Model. VTS 2003: 345-350
	2000
7		Ananta K. Majhi, V. D. Agrawak, James Jacob, Lalit M. Patnaik: Line coverage of path delay faults. IEEE Trans. VLSI Syst. 8(5): 610-614 (2000)
	1998
6		Ananta K. Majhi, Vishwani D. Agrawal: Mixed-Signal Test. VLSI Design 1998: 285-288
5		Ananta K. Majhi, Vishwani D. Agrawal: Tutorial: Delay Fault Models and Coverage. VLSI Design 1998: 364-369
4		S. Balajee, Ananta K. Majhi: Automated AC (Timing) Characterization for Digital Circuit Testing. VLSI Design 1998: 374-377
	1996
3		Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vishwani D. Agrawal: On test coverage of path delay faults. VLSI Design 1996: 418-421
	1995
2		Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vishwani D. Agrawal: An efficient automatic test generation system for path delay faults in combinational circuits. VLSI Design 1995: 161-165
1		Ananta K. Majhi, Lalit M. Patnaik, Srilata Raman: A genetic algorithm-based circuit partitioner for MCMs. Microprocessing and Microprogramming 41(1): 83-96 (1995)

Coauthor Index

1	V. D. Agrawak	[7]
2	Vishwani D. Agrawal	[2] [3] [5] [6]
3	Daniel Arumí	[17] [18]
4	Mohamed Azimane	[9] [12] [13] [15]
5	S. Balajee	[4]
6	Fred Bowen	[13] [15]
7	Stefan Eichenberger	[8] [10] [11] [13] [14] [15] [17] [18]
8	Joan Figueras	[17] [18]
9	Guido Gronthoud	[8] [11] [12] [13] [14] [15] [16]
10	Camelia Hora	[8] [10] [17] [18]
11	James Jacob	[2] [3] [7]
12	Lavanya Jagan	[19]
13	V. Kamakoti	[19]
14	Bram Kruseman	[10] [11] [14] [16] [17] [18]
15	Maurice Lousberg	[8] [12] [13] [15] [17] [18]
16	Xiang Lu	[14]
17	Johan Meirlevede	[10]
18	Lalit M. Patnaik	[1] [2] [3] [7]
19	Srilata Raman	[1]
20	Rosa Rodríguez-Montañés	[17] [18]
21	Ratan Deep Singh	[19]
22	Pop Valer	[8]
23	Luis Elvira Villagra	[14]
24	D. M. H. Walker (Duncan M. Hank Walker)	[14]
25	Jing Wang	[14]
26	Paul J. A. M. van de Wiel	[14]

Colors in the list of coauthors