Amitava Majumdar

	2007
25		Yifeng Cui, Reagan Moore, Kim Olsen, Amit Chourasia, Philip Maechling, Bernard Minster, Steven M. Day, Yuanfang Hu, Jing Zhu, Amitava Majumdar, Thomas Jordan: Enabling Very-Large Scale Earthquake Simulations on Parallel Machines. International Conference on Computational Science (1) 2007: 46-53
	2006
24		Amitava Majumdar, Wei-Yu Chen, Jun Guo: Hold time validation on silicon and the relevance of hazards in timing analysis. DAC 2006: 326-331
23		Tharaka Devadithya, Kim Baldridge, Adam Birnbaum, Amitava Majumdar, Dong Ju Choi, Richard Wolski, Simon K. Warfield, Neculai Archip: On-Demand High Performance Computing: Image Guided Neuro-Surgery Feasibility Study. ICPADS (2) 2006: 97-102
	2005
22		Amitava Majumdar, Adam Birnbaum, Dong Ju Choi, Abhishek Trivedi, Simon K. Warfield, Kim Baldridge, Petr Krysl: A Dynamic Data Driven Grid System for Intra-operative Image Guided Neurosurgery. International Conference on Computational Science (2) 2005: 672-679
	2003
21		Olivier Caty, Ismet Bayraktaroglu, Amitava Majumdar, Richard Lee, John Bell, Lisa Curhan: Instruction Based BIST for Board/System Level Test of External Memories and Internconnects. ITC 2003: 961-970
	2002
20		Ishwar Parulkar, Thomas A. Ziaja, Rajesh Pendurkar, Anand D'Souza, Amitava Majumdar: A Scalable, Low Cost Design-for-Test Architecture for UltraSPARC? Chip Multi-Processors. ITC 2002: 726-735
19		Yuni K. Dewaraja, Michael Ljungberg, Amitava Majumdar, Abhijit Bose, Kenneth F. Koral: A parallel Monte Carlo code for planar and SPECT imaging: implementation, verification and applications in 131I SPECT. Computer Methods and Programs in Biomedicine 67(2): 115-124 (2002)
	2001
18		Kamran Zarrineh, Thomas A. Ziaja, Amitava Majumdar: Automatic Generation and Validation of Memory Test Models for High Performance Microprocessors. ICCD 2001: 526-529
	2000
17		Amitava Majumdar: arallel Performance Study of Monte Carlo Photon Transport Code on Shared-, Distributed-, and Distributed-Shared-Memory Architectures. IPDPS 2000: 93-
16		Dimitri Kagaris, Spyros Tragoudas, Amitava Majumdar: Test-set partitioning for multi-weighted random LFSRs. Integration 30(1): 65-75 (2000)
	1998
15		Dimitrios Kagaris, Spyros Tragoudas, Amitava Majumdar: On-Chip Test Embedding for Multi-Weighted Random LFSRs. DFT 1998: 135-
14		Amitava Majumdar, Michio Komoda, Tim Ayres: Ground Bounce Considerations in DC Parametric Test Generation Using Boundary Scan. VTS 1998: 86-91
	1997
13		Rahul Simha, Amitava Majumdar: An urn model with applications to database performance evaluation. Computers & OR 24(4): 289-300 (1997)
	1996
12		Dimitrios Kagaris, Spyros Tragoudas, Amitava Majumdar: On the Use of Counters for Reproducing Deterministic Test Sets. IEEE Trans. Computers 45(12): 1405-1419 (1996)
11		Amitava Majumdar: On Evaluating and Optimizing Weights for Weighted Random Pattern Testing. IEEE Trans. Computers 45(8): 904-916 (1996)
	1995
10		Amitava Majumdar, Sarma B. K. Vrudhula: Fault Coverage and Test Length Estimation for Random Pattern Testing. IEEE Trans. Computers 44(2): 234-247 (1995)
	1994
9		Amitava Majumdar: WRAPTure: A Tool for Evaluation and Optimization of Weights for Weighted Random Pattern Testing. ICCD 1994: 288-291
8		Rahul Simha, Amitava Majumdar: On Lookahead in the List Update Problem. Inf. Process. Lett. 50(2): 105-110 (1994)
7		Amitava Majumdar, Sarma B. K. Vrudhula: Techniques for estimating test length under random test. J. Electronic Testing 5(2-3): 285-297 (1994)
	1993
6		Amitava Majumdar, Sarma Sastry: Statistical Analysis of Controllability. VLSI Design 1993: 55-60
5		Amitava Majumdar, Sarma Sastry: Probabilistic characterization of controllability in general homogeneous circuits. Computer-Aided Design 25(2): 76-93 (1993)
4		Amitava Majumdar, Sarma B. K. Vrudhula: Analysis of signal probability in logic circuits using stochastic models. IEEE Trans. VLSI Syst. 1(3): 365-379 (1993)
	1992
3		Amitava Majumdar, Sarma Sastry: On the Distribution of Fault Coverage and Test length in Random Testing of Combinational Circuits. DAC 1992: 341-346
	1991
2		Sarma Sastry, Amitava Majumdar: A Branching Process Model for Observability Analysis of Combinational Circuits. DAC 1991: 452-457
1		Sarma Sastry, Amitava Majumdar: Test efficiency analysis of random self-test of sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 10(3): 390-398 (1991)

Coauthor Index

1	Neculai Archip	[23]
2	Tim Ayres	[14]
3	Kim Baldridge	[22] [23]
4	Ismet Bayraktaroglu	[21]
5	John Bell	[21]
6	Adam Birnbaum	[22] [23]
7	Abhijit Bose	[19]
8	Olivier Caty	[21]
9	Wei-Yu Chen	[24]
10	Dong Ju Choi	[22] [23]
11	Amit Chourasia	[25]
12	Yifeng Cui	[25]
13	Lisa Curhan	[21]
14	Anand D'Souza	[20]
15	Steven M. Day	[25]
16	Tharaka Devadithya	[23]
17	Yuni K. Dewaraja	[19]
18	Jun Guo	[24]
19	Yuanfang Hu	[25]
20	Thomas Jordan	[25]
21	Dimitrios Kagaris (Dimitri Kagaris)	[12] [15] [16]
22	Michio Komoda	[14]
23	Kenneth F. Koral	[19]
24	Petr Krysl	[22]
25	Richard Lee	[21]
26	Michael Ljungberg	[19]
27	Philip Maechling	[25]
28	Bernard Minster	[25]
29	Reagan Moore (Reagan W. Moore)	[25]
30	Kim Olsen	[25]
31	Ishwar Parulkar	[20]
32	Rajesh Pendurkar	[20]
33	Sarma Sastry	[1] [2] [3] [5] [6]
34	Rahul Simha	[8] [13]
35	Spyros Tragoudas	[12] [15] [16]
36	Abhishek Trivedi	[22]
37	Sarma B. K. Vrudhula	[4] [7] [10]
38	Simon K. Warfield	[22] [23]
39	Richard Wolski	[23]
40	Kamran Zarrineh	[18]
41	Jing Zhu	[25]
42	Thomas A. Ziaja	[18] [20]

Colors in the list of coauthors