Wai-Kei Mak

	2009
29		Cheng-Yu Wang, Wai-Kei Mak: Signal skew aware floorplanning and bumper signal assignment technique for flip-chip. ASP-DAC 2009: 341-346
28		Chun-Yu Chuang, Wai-Kei Mak: Accurate closed-form parameterized block-based statistical timing analysis applying skew-normal distribution. ISQED 2009: 68-73
	2008
27		Wei-Chung Chao, Wai-Kei Mak: Low-power gated and buffered clock network construction. ACM Trans. Design Autom. Electr. Syst. 13(1): (2008)
26		George A. Constantinides, Wai-Kei Mak, Theerayod Wiangtong: Guest Editorial: Field Programmable Technology. Signal Processing Systems 51(1): 1-2 (2008)
	2007
25		Wai-Kei Mak, Jr-Wei Chen: Voltage Island Generation under Performance Requirement for SoC Designs. ASP-DAC 2007: 798-803
	2006
24		Chien-Chang Chen, Wai-Kei Mak: A multi-technology-process reticle floorplanner and wafer dicing planner for multi-project wafers. ASP-DAC 2006: 777-782
	2005
23		Wai-Kei Mak: Modern FPGA constrained placement. ASP-DAC 2005: 779-784
	2004
22		Hao Li, Wai-Kei Mak, Srinivas Katkoori: Force-Directed Performance-Driven Placement Algorithm for FPGAs. ISVLSI 2004: 193-198
21		Hao Li, Srinivas Katkoori, Wai-Kei Mak: Power minimization algorithms for LUT-based FPGA technology mapping. ACM Trans. Design Autom. Electr. Syst. 9(1): 33-51 (2004)
20		Wai-Kei Mak: I/O placement for FPGAs with multiple I/O standards. IEEE Trans. on CAD of Integrated Circuits and Systems 23(2): 315-321 (2004)
	2003
19		Eric S. H. Wong, Evangeline F. Y. Young, Wai-Kei Mak: Clustering based acyclic multi-way partitioning. ACM Great Lakes Symposium on VLSI 2003: 203-206
18		Wai-Kei Mak: I/O placement for FPGAs with multiple I/O standards. FPGA 2003: 51-57
17		Wai-Kei Mak, Evangeline F. Y. Young: Temporal logic replication for dynamically reconfigurable FPGA partitioning. IEEE Trans. on CAD of Integrated Circuits and Systems 22(7): 952-959 (2003)
	2002
16		Wai-Kei Mak, Evangeline F. Y. Young: Temporal logic replication for dynamically reconfigurable FPGA partitioning. ISPD 2002: 190-195
15		Wai-Kei Mak: Min-cut partitioning with functional replication fortechnology-mapped circuits using minimum area overhead. IEEE Trans. on CAD of Integrated Circuits and Systems 21(4): 491-497 (2002)
	2001
14		Hung-Ming Chen, D. F. Wong, Wai-Kei Mak, Hannah Honghua Yang: Faster and more accurate wiring evaluation in interconnect-centric floorplanning. ACM Great Lakes Symposium on VLSI 2001: 62-67
13		Wai-Kei Mak: Min-cut partitioning with functional replication for technology mapped circuits using minimum area overhead. ISPD 2001: 100-105
	2000
12		Wai-Kei Mak, D. F. Wong: A fast hypergraph min-cut algorithm for circuit partitioning. Integration 30(1): 1-11 (2000)
	1999
11		Wai-Kei Mak, D. F. Wong: A fast hypergraph minimum cut algorithm. ISCAS (6) 1999: 170-173
10		Wai-Kei Mak, David P. Morton, R. Kevin Wood: Monte Carlo bounding techniques for determining solution quality in stochastic programs. Oper. Res. Lett. 24(1-2): 47-56 (1999)
	1998
9		Wai-Kei Mak, D. F. Wong: Performance-Driven Board-Level Routing for FPGA-Based Logic Emulation (Abstract). FPGA 1998: 260
	1997
8		Wai-Kei Mak, D. F. Wong: Channel Segmentation Design for Symmentrical FPGAs. ICCD 1997: 496-501
7		Wai-Kei Mak, D. F. Wong: Board-level multiterminal net routing for FPGA-based logic emulation. ACM Trans. Design Autom. Electr. Syst. 2(2): 151-167 (1997)
6		Wai-Kei Mak, Martin D. F. Wong: Minimum replication min-cut partitioning. IEEE Trans. on CAD of Integrated Circuits and Systems 16(10): 1221-1227 (1997)
5		Wai-Kei Mak, Martin D. F. Wong: On optimal board-level routing for FPGA-based logic emulation. IEEE Trans. on CAD of Integrated Circuits and Systems 16(3): 282-289 (1997)
	1996
4		Wai-Kei Mak, D. F. Wong: Minimum replication min-cut partitioning. ICCAD 1996: 205-210
	1995
3		Wai-Kei Mak, D. F. Wong: On Optimal Board-Level Routing for FPGA-Based Logic Emulation. DAC 1995: 552-556
2		Wai-Kei Mak, D. F. Wong: Board-level multi-terminal net routing for FPGA-based logic emulation. ICCAD 1995: 339-344
	1990
1		Richard G. Guy, John S. Heidemann, Wai-Kei Mak, Thomas W. Page Jr., Gerald J. Popek, Dieter Rothmeier: Implementation of the Ficus Replicated File System. USENIX Summer 1990: 63-72

Coauthor Index

1	Wei-Chung Chao	[27]
2	Chien-Chang Chen	[24]
3	Hung-Ming Chen	[14]
4	Jr-Wei Chen	[25]
5	Chun-Yu Chuang	[28]
6	George A. Constantinides	[26]
7	Richard G. Guy	[1]
8	John S. Heidemann	[1]
9	Srinivas Katkoori	[21] [22]
10	Hao Li	[21] [22]
11	David P. Morton	[10]
12	Thomas W. Page Jr.	[1]
13	Gerald J. Popek	[1]
14	Dieter Rothmeier	[1]
15	Cheng-Yu Wang	[29]
16	Theerayod Wiangtong	[26]
17	Eric S. H. Wong	[19]
18	Martin D. F. Wong (D. F. Wong)	[2] [3] [4] [5] [6] [7] [8] [9] [11] [12] [14]
19	R. Kevin Wood	[10]
20	Hannah Honghua Yang (Honghua Yang)	[14]
21	Evangeline F. Y. Young (F. Y. Young, Fung Yu Young)	[16] [17] [19]

Colors in the list of coauthors