Pradip Mandal

	2009
19		Samiran DasGupta, Pradip Mandal: An automated design approach for CMOS LDO regulators. ASP-DAC 2009: 510-515
18		P. V. Ratna Kumar, Kaushik Bhattacharyya, Tamal Das, Pradip Mandal: Improvement of power efficiency in switched capacitor DC-DC converter by shoot-through current elimination. ISLPED 2009: 81-86
17		Tamal Das, Pradip Mandal: Switched-Capacitor Based Buck Converter Design Using Current Limiter for Better Efficiency and Output Ripple. VLSI Design 2009: 181-186
	2008
16		Saurav Bandyopadhyay, Pradip Mandal, Stephen E. Ralph, Kenneth Pedrotti: Integrated TIA-Equalizer for High Speed Optical Link. VLSI Design 2008: 208-213
15		Kaushik Bhattacharyya, Pradip Mandal: A Low Voltage, Low Ripple, on Chip, Dual Switch-Capacitor Based Hybrid DC-DC Converter. VLSI Design 2008: 661-666
	2006
14		Kshitij Yadav, Pradip Mandal: Design and Analysis of a VHF OTA-C Cell for Optimum Phase Response. APCCAS 2006: 1599-1602
13		R. G. Raghavendra, Pradip Mandal: An On-Chip Voltage Regulator with Improved Load Regulation and Light Load Power Efficiency. VLSI Design 2006: 331-336
	2005
12		Gunjan Mandal, Pradip Mandal: Low-power LVDS receiver for 1.3Gbps physical layer (PHY) interface. ISCAS (3) 2005: 2180-2183
11		S. S. Prasad, Pradip Mandal: A single circuit solution for voltage sensors. ISCAS (4) 2005: 3865-3868
10		Debashis Mandal, Pradip Mandal: High voltage tolerant output buffer design for mixed voltage interfaces. ISCAS (5) 2005: 4277-4280
9		Ashis Maity, R. G. Raghavendra, Pradip Mandal: On-Chip Voltage Regulator with Improved Transient Response. VLSI Design 2005: 522-527
	2004
8		Gunjan Mandal, Pradip Mandal: Low power LVDS transmitter with low common mode variation for 1GB/s-per pin operation. ISCAS (1) 2004: 1120-1123
7		S. S. Prasad, Pradip Mandal: A CMOS Beta Multiplier Voltage Reference with Improved Temperature Performance and Silicon Tunability. VLSI Design 2004: 551-
6		Pradip Mandal: A Narrow Pulse- Suppressing Filter For Input Buffer. VLSI Design 2004: 701-704
	2001
5		Pradip Mandal, V. Visvanathan: CMOS op-amp sizing using a geometric programming formulation. IEEE Trans. on CAD of Integrated Circuits and Systems 20(1): 22-38 (2001)
	1999
4		Pradip Mandal, V. Visvanathan: A New Approach for CMOS Op-Amp Synthesis. VLSI Design 1999: 189-195
	1997
3		Pradip Mandal, V. Visvanathan: A Self-Biased High Performance Folded Cascode CMOS Op-Amp. VLSI Design 1997: 429-434
	1996
2		Pradip Mandal, V. Visvanathan: Design of high performance two stage CMOS cascode op-amps with stable biasing. VLSI Design 1996: 234-237
	1993
1		Pradip Mandal, V. Visvanathan: Macromodeling of the A.C. characteristics of CMOS Op-amps. ICCAD 1993: 334-340

Coauthor Index

1	Saurav Bandyopadhyay	[16]
2	Kaushik Bhattacharyya	[15] [18]
3	Tamal Das	[17] [18]
4	Samiran DasGupta	[19]
5	P. V. Ratna Kumar	[18]
6	Ashis Maity	[9]
7	Debashis Mandal	[10]
8	Gunjan Mandal	[8] [12]
9	Kenneth Pedrotti	[16]
10	S. S. Prasad	[7] [11]
11	R. G. Raghavendra	[9] [13]
12	Stephen E. Ralph	[16]
13	V. Visvanathan	[1] [2] [3] [4] [5]
14	Kshitij Yadav	[14]

Colors in the list of coauthors