Pete Manolios
List of publications from the DBLP Bibliography Server - FAQ
| 2009 | ||
|---|---|---|
| 45 | Benjamin Chambers, Panagiotis Manolios, Daron Vroon: Faster SAT solving with better CNF generation. DATE 2009: 1590-1595 | |
| 44 | Peter C. Dillinger, Panagiotis Manolios: Fast, All-Purpose State Storage. SPIN 2009: 12-31 | |
| 43 | Panagiotis Manolios, Aaron Turon: All-Termination(T). TACAS 2009: 398-412 | |
| 42 | Matthew Might, Panagiotis Manolios: A PosterioriSoundness for Non-deterministic Abstract Interpretations. VMCAI 2009: 260-274 | |
| 2008 | ||
| 41 | Panagiotis Manolios, Sudarshan K. Srinivasan: Automatic verification of safety and liveness for pipelined machines using WEB refinement. ACM Trans. Design Autom. Electr. Syst. 13(3): (2008) | |
| 40 | William G. J. Halfond, Alessandro Orso, Pete Manolios: WASP: Protecting Web Applications Using Positive Tainting and Syntax-Aware Evaluation. IEEE Trans. Software Eng. 34(1): 65-81 (2008) | |
| 39 | Panagiotis Manolios, Sudarshan K. Srinivasan: A Refinement-Based Compositional Reasoning Framework for Pipelined Machine Verification. IEEE Trans. VLSI Syst. 16(4): 353-364 (2008) | |
| 38 | David A. Greve, Matt Kaufmann, Panagiotis Manolios, J. Strother Moore, Sandip Ray, José-Luis Ruiz-Reina, Rob Sumners, Daron Vroon, Matthew Wilding: Efficient execution in an automated reasoning environment. J. Funct. Program. 18(1): 15-46 (2008) | |
| 2007 | ||
| 37 | Panagiotis Manolios, Sudarshan K. Srinivasan, Daron Vroon: BAT: The Bit-Level Analysis Tool. CAV 2007: 303-306 | |
| 36 | Peter C. Dillinger, Panagiotis Manolios, Daron Vroon, J. Strother Moore: ACL2s: "The ACL2 Sedan". ICSE Companion 2007: 59-60 | |
| 35 | Panagiotis Manolios, Daron Vroon, Gayatri Subramanian: Automating component-based system assembly. ISSTA 2007: 61-72 | |
| 34 | Panagiotis Manolios, Daron Vroon: Efficient Circuit to CNF Conversion. SAT 2007: 4-9 | |
| 33 | Panagiotis Manolios, Marc Galceran Oms, Sergi Oliva Valls: Checking Pedigree Consistency with PCS. TACAS 2007: 339-342 | |
| 32 | Peter C. Dillinger, Panagiotis Manolios, Daron Vroon, J. Strother Moore: ACL2s: "The ACL2 Sedan". Electr. Notes Theor. Comput. Sci. 174(2): 3-18 (2007) | |
| 2006 | ||
| 31 | Panagiotis Manolios, Matthew Wilding: Proceedings of the Sixth International Workshop on the ACL2 Theorem Prover and its Applications, ACL2 2006, Seattle, Washington, USA, August 15-16, 2006 ACM 2006 | |
| 30 | Panagiotis Manolios, Daron Vroon: Termination Analysis with Calling Context Graphs. CAV 2006: 401-414 | |
| 29 | Roma Kane, Panagiotis Manolios, Sudarshan K. Srinivasan: Monolithic verification of deep pipelines with collapsed flushing. DATE 2006: 1234-1239 | |
| 28 | Panagiotis Manolios, Sudarshan K. Srinivasan, Daron Vroon: Automatic memory reductions for RTL model verification. ICCAD 2006: 786-793 | |
| 27 | Panagiotis Manolios, Daron Vroon: Integrating static analysis and general-purpose theorem proving for termination analysis. ICSE 2006: 873-876 | |
| 26 | Panagiotis Manolios, Yimin Zhang: Implementing Survey Propagation on Graphics Processing Units. SAT 2006: 311-324 | |
| 25 | Panagiotis Manolios: Refinement and Theorem Proving. SFM 2006: 176-210 | |
| 24 | William G. J. Halfond, Alessandro Orso, Panagiotis Manolios: Using positive tainting and syntax-aware evaluation to counter SQL injection attacks. SIGSOFT FSE 2006: 175-185 | |
| 23 | Panagiotis Manolios, Sudarshan K. Srinivasan: A Framework for Verifying Bit-Level Pipelined Machines Based on Automated Deduction and Decision Procedures. J. Autom. Reasoning 37(1-2): 93-116 (2006) | |
| 2005 | ||
| 22 | Panagiotis Manolios, Sudarshan K. Srinivasan: A Parameterized Benchmark Suite of Hard Pipelined-Machine-Verification Problems. CHARME 2005: 363-366 | |
| 21 | Panagiotis Manolios, Sudarshan K. Srinivasan: Refinement Maps for Efficient Verification of Processor Models. DATE 2005: 1304-1309 | |
| 20 | Panagiotis Manolios, Sudarshan K. Srinivasan: Verification of executable pipelined machines with bit-level interfaces. ICCAD 2005: 855-862 | |
| 19 | Panagiotis Manolios, Sudarshan K. Srinivasan: A complete compositional reasoning framework for the efficient verification of pipelined machines. ICCAD 2005: 863-870 | |
| 18 | Panagiotis Manolios, Sudarshan K. Srinivasan: A computationally ef~cient method based on commitment re~nement maps for verifying pipelined machines. MEMOCODE 2005: 188-197 | |
| 17 | Peter C. Dillinger, Panagiotis Manolios: Enhanced Probabilistic Verification with 3Spin and 3Murphi. SPIN 2005: 272-276 | |
| 16 | Panagiotis Manolios: The Challenge of Hardware-Software Co-verification. VSTTE 2005: 438-447 | |
| 15 | Panagiotis Manolios, Daron Vroon: Ordinal Arithmetic: Algorithms and Mechanization. J. Autom. Reasoning 34(4): 387-423 (2005) | |
| 2004 | ||
| 14 | Panagiotis Manolios, Sudarshan K. Srinivasan: Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements. DATE 2004: 168-175 | |
| 13 | Peter C. Dillinger, Panagiotis Manolios: Bloom Filters in Probabilistic Verification. FMCAD 2004: 367-381 | |
| 12 | Panagiotis Manolios, Daron Vroon: Integrating Reasoning About Ordinal Arithmetic into ACL2. FMCAD 2004: 82-97 | |
| 11 | Peter C. Dillinger, Panagiotis Manolios: Fast and Accurate Bitstate Verification for SPIN. SPIN 2004: 57-75 | |
| 2003 | ||
| 10 | Panagiotis Manolios, Daron Vroon: Algorithms for Ordinal Arithmetic. CADE 2003: 243-257 | |
| 9 | Panagiotis Manolios: A Compositional Theory of Refinement for Branching Time. CHARME 2003: 304-318 | |
| 8 | Panagiotis Manolios, Richard J. Trefler: A lattice-theoretic characterization of safety and liveness. PODC 2003: 325-333 | |
| 7 | Panagiotis Manolios: Brief announcement: branching time refinement. PODC 2003: 334 | |
| 6 | Panagiotis Manolios, J. Strother Moore: Partial Functions in ACL2. J. Autom. Reasoning 31(2): 107-127 (2003) | |
| 2001 | ||
| 5 | Panagiotis Manolios, Richard J. Trefler: Safety and Liveness in Branching Time. LICS 2001: 366- | |
| 4 | Panagiotis Manolios, J. Strother Moore: On the desirability of mechanizing calculational proofs. Inf. Process. Lett. 77(2-4): 173-179 (2001) | |
| 2000 | ||
| 3 | Panagiotis Manolios: Correctness of Pipelined Machines. FMCAD 2000: 161-178 | |
| 1999 | ||
| 2 | Panagiotis Manolios, Kedar S. Namjoshi, Robert Summers: Linking Theorem Proving and Model-Checking with Well-Founded Bisimulation. CAV 1999: 369-379 | |
| 1 | Yuan Yu, Panagiotis Manolios, Leslie Lamport: Model Checking TLA+ Specifications. CHARME 1999: 54-66 | |
| 1 | Benjamin Chambers | [45] |
| 2 | Peter C. Dillinger | [11] [13] [17] [32] [36] [44] |
| 3 | David A. Greve | [38] |
| 4 | William G. J. Halfond | [24] [40] |
| 5 | Roma Kane | [29] |
| 6 | Matt Kaufmann | [38] |
| 7 | Leslie Lamport | [1] |
| 8 | Matthew Might | [42] |
| 9 | J. Strother Moore | [4] [6] [32] [36] [38] |
| 10 | Kedar S. Namjoshi | [2] |
| 11 | Marc Galceran Oms | [33] |
| 12 | Alessandro Orso | [24] [40] |
| 13 | Sandip Ray | [38] |
| 14 | José-Luis Ruiz-Reina | [38] |
| 15 | Sudarshan K. Srinivasan | [14] [18] [19] [20] [21] [22] [23] [28] [29] [37] [39] [41] |
| 16 | Gayatri Subramanian | [35] |
| 17 | Robert Summers | [2] |
| 18 | Robert W. Sumners (Rob Sumners) | [38] |
| 19 | Richard J. Trefler | [5] [8] |
| 20 | Aaron Turon | [43] |
| 21 | Sergi Oliva Valls | [33] |
| 22 | Daron Vroon | [10] [12] [15] [27] [28] [30] [32] [34] [35] [36] [37] [38] [45] |
| 23 | Matthew Wilding | [31] [38] |
| 24 | Yuan Yu | [1] |
| 25 | Yimin Zhang | [26] |