 | 2009 |
|---|
| 32 |       | Marc Drewniok,
Massimo Maresca,
Sancho Rego,
Jürgen Sienel,
Michele Stecca:
Experiments and performance evaluation of Event Driven Mashups.
ISCC 2009: 19-22 |
| 2008 |
|---|
| 31 | | Martino Fornasa,
Nicola Zingirian,
Massimo Maresca:
Extensive GPRS Latency Characterization in Uplink Packet Transmission from Moving Vehicles.
VTC Spring 2008: 2562-2566 |
| 2005 |
|---|
| 30 | | Martino Fornasa,
Massimo Maresca,
Nicola Zingirian,
L. Ballardin,
S. Bedin:
Development of a service-oriented architecture for the dynamic integration of mobile remote software components.
ETFA 2005 |
| 29 | | Pierpaolo Baglietto,
Massimo Maresca,
Andrea Parodi,
Nicola Zingirian:
Stepwise deployment methodology of a service oriented architecture for business communities.
Information & Software Technology 47(6): 427-436 (2005) |
| 2003 |
|---|
| 28 | | Pierpaolo Baglietto,
Francesco Moggia,
Nicola Zingirian,
Massimo Maresca:
Application Level Smart Card Support through Networked Mobile Devices.
Communications and Multimedia Security 2003: 172-180 |
| 27 | | Mauro Migliardi,
Stefano Zappaterra,
Massimo Maresca,
Chiara Bisso:
HARNESSing Intranet Computational Power for Legacy Applications: The Case of Ship Vulnerability Evaluation.
IPDPS 2003: 103 |
| 2002 |
|---|
| 26 | | Pierpaolo Baglietto,
Massimo Maresca,
Andrea Parodi,
Nicola Zingirian:
Deployment of Service Oriented Architecture for a Business Community.
EDOC 2002: 293-304 |
| 2001 |
|---|
| 25 | | Nicola Zingirian,
Massimo Maresca:
Selective Register Renaming: A Compiler-Driven Approach to Dynamic Register Renaming.
HPCN Europe 2001: 344-352 |
| 2000 |
|---|
| 24 | | Nicola Zingirian,
Massimo Maresca:
Loop Regularization for Image and Video Processing on Instruction Level Parallel Architectures.
CAMP 2000: 261-269 |
| 23 | | Nicola Zingirian,
Massimo Maresca:
Run-Time Support to Register Allocation for Loop Parallelization of Image Processing Programs.
HPCN Europe 2000: 343-352 |
| 1999 |
|---|
| 22 |  | Nicola Zingirian,
Massimo Maresca:
Finding the Optimal Unroll-and-Jam.
HPCN Europe 1999: 633-642 |
| 21 | | Nicola Zingirian,
Massimo Maresca,
S. Nalin:
Efficiency of standard software architectures for Java-based access to remote databases.
Future Generation Comp. Syst. 15(3): 417-424 (1999) |
| 1998 |
|---|
| 20 | | Nicola Zingirian,
Massimo Maresca,
S. Nalin:
Efficiency of Standard Software Architectures for JAVA-Based Access to Remote Databases.
HPCN Europe 1998: 479-488 |
| 19 | | Mauro Migliardi,
Pierpaolo Baglietto,
Massimo Maresca:
Virtual Parallelism allows Relaxing the Synchronization Constraints of SIMD Computing Paradigm.
HPCN Europe 1998: 784-793 |
| 18 | | Pierpaolo Baglietto,
Massimo Maresca,
Mauro Migliardi:
A Parallel Algorithm for Minimum Cost Path Computation on Polymorphic Processor Array.
IPPS/SPDP Workshops 1998: 13-18 |
| 1997 |
|---|
| 17 | | Nicola Zingirian,
Massimo Maresca:
Scheduling Image Processing Program Activities on Instruction Level Parallel RISC Through Program Transformations.
HPCN Europe 1997: 674-687 |
| 16 | | Mauro Migliardi,
Massimo Maresca:
Modeling Instruction Level Parallel Architectures Efficiency in Image Processing Applications.
HPCN Europe 1997: 738-751 |
| 15 | | Nicola Zingirian,
Pierpaolo Baglietto,
Massimo Maresca,
Mauro Migliardi:
Customizing MPEG Video Compression Algorithms to Specific Application Domains: The Case of Highway Monitoring.
ICIAP (2) 1997: 46-53 |
| 1995 |
|---|
| 14 | | Pierpaolo Baglietto,
Massimo Maresca,
A. Migliaro,
Mauro Migliardi:
Parallel Implementation of the Full Search Block Matching Algorithm for Motion Estimation.
ASAP 1995: 182-192 |
| 13 | | Pierpaolo Baglietto,
Massimo Maresca,
A. Migliaro,
Mauro Migliardi:
A VLSI Scalable Processor Array for Motion Estimation.
ICIAP 1995: 127-132 |
| 1994 |
|---|
| 12 | | Pierpaolo Baglietto,
Massimo Maresca,
Mauro Migliardi:
Introducing Execution Autonomy in the SIMD Computing Paradigm.
EUROSIM 1994: 295-303 |
| 1993 |
|---|
| 11 | | Massimo Maresca,
Hungwen Li,
Pierpaolo Baglietto:
Hardware Suport for Fast Reconfigurability in Processor Arrays.
ICPP 1993: 282-289 |
| 10 | | Massimo Maresca,
Pierpaolo Baglietto,
A. Giordano:
An Analysis of the Propagation Delay in Reconfigurable Processor Arrays.
PARCO 1993: 379-386 |
| 9 | | Massimo Maresca:
Polymorphic Processor Arrays.
IEEE Trans. Parallel Distrib. Syst. 4(5): 490-506 (1993) |
| 8 | | Massimo Maresca,
Hungwen Li:
Virtual Parallelism Support in Reconfigurable Processor Arrays.
J. Inf. Sci. Eng. 9(1): 45-60 (1993) |
| 7 | | Massimo Maresca,
Pierpaolo Baglietto,
A. Giordano:
Image component labeling on reconfigurable processor array.
Microprocessing and Microprogramming 38(1-5): 327-334 (1993) |
| 1991 |
|---|
| 6 | | Massimo Maresca,
Pierpaolo Baglietto:
Transitive Closure and Graph Component Labeling on Realistic Processor Arrays Based on Reconfigurable Mesh Network.
ICCD 1991: 229-232 |
| 5 | | Riccardo Gusella,
Massimo Maresca:
Design Considerations for a Multimedia Network Distribution Center.
NOSSDAV 1991: 185-196 |
| 1989 |
|---|
| 4 | | Hungwen Li,
Massimo Maresca:
Polymorphic-Torus Network.
IEEE Trans. Computers 38(9): 1345-1351 (1989) |
| 3 | | Hungwen Li,
Massimo Maresca:
Polymorphic-Torus Architecture for Computer Vision.
IEEE Trans. Pattern Anal. Mach. Intell. 11(3): 233-243 (1989) |
| 2 | | Massimo Maresca,
Hungwen Li:
Connection Autonomy in SIMD Computers: A VLSI Implementation.
J. Parallel Distrib. Comput. 7(2): 302-320 (1989) |
| 1987 |
|---|
| 1 | | Hungwen Li,
Massimo Maresca:
Polymorphic-Torus Network.
ICPP 1987: 411-414 |
