| 2009 | ||
|---|---|---|
| 103 | André Seznec, Joel S. Emer, Michael F. P. O'Boyle, Margaret Martonosi, Theo Ungerer: High Performance Embedded Architectures and Compilers, Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings Springer 2009 | |
| 102 | Abhishek Bhattacharjee, Margaret Martonosi: Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors. ISCA 2009: 290-301 | |
| 2008 | ||
| 101 | Tarek F. Abdelzaher, Margaret Martonosi, Adam Wolisz: Proceedings of the 6th International Conference on Embedded Networked Sensor Systems, SenSys 2007, Raleigh, NC, USA, November 5-7, 2008 ACM 2008 | |
| 100 | Stefanos Kaxiras, Margaret Martonosi: Computer Architecture Techniques for Power-Efficiency Morgan & Claypool Publishers 2008 | |
| 99 | Margaret Martonosi: ZebraNet and beyond: applications and systems support for mobile, dynamic networks. CASES 2008: 21 | |
| 98 | Vincent Lenders, Emmanouil Koukoumidis, Pei Zhang, Margaret Martonosi: Location-based trust for mobile user-generated content: applications, challenges and implementations. HotMobile 2008: 60-64 | |
| 97 | Gilberto Contreras, Margaret Martonosi: Characterizing and improving the performance of Intel Threading Building Blocks. IISWC 2008: 57-66 | |
| 96 | Pei Zhang, Margaret Martonosi: LOCALE: Collaborative Localization Estimation for Sparse Mobile Sensor Networks. IPSN 2008: 195-206 | |
| 95 | Abhishek Bhattacharjee, Gilberto Contreras, Margaret Martonosi: Full-system chip multiprocessor power evaluations using FPGA-based emulation. ISLPED 2008: 335-340 | |
| 94 | Sibren Isaacman, Margaret Martonosi: Potential for collaborative caching and prefetching in largely-disconnected villages. Wireless Networks and Systems for Developing Regions 2008: 23-30 | |
| 2007 | ||
| 93 | Eric Chi, Stephen A. Lyon, Margaret Martonosi: Tailoring quantum architectures to implementation style: a quantum computer for mobile and persistent qubits. ISCA 2007: 198-209 | |
| 92 | Christopher M. Sadler, Margaret Martonosi: Dali: a communication-centric data abstraction layer for energy-constrained devices in mobile sensor networks. MobiSys 2007: 99-112 | |
| 91 | Gilberto Contreras, Margaret Martonosi, Jinzhang Peng, Guei-Yuan Lueh, Roy Ju: The XTREM power and performance simulator for the Intel XScale core: Design and experiences. ACM Trans. Embedded Comput. Syst. 6(1): (2007) | |
| 90 | Yong Wang, Margaret Martonosi, Li-Shiuan Peh: Predicting link quality using supervised learning in wireless sensor networks. Mobile Computing and Communications Review 11(3): 71-83 (2007) | |
| 2006 | ||
| 89 | John Paul Shen, Margaret Martonosi: Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2006, San Jose, CA, USA, October 21-25, 2006 ACM 2006 | |
| 88 | Canturk Isci, Margaret Martonosi: Phase characterization for power: evaluating control-flow-based and event-counter-based techniques. HPCA 2006: 121-132 | |
| 87 | Gilberto Contreras, Margaret Martonosi: Techniques for Real-System Characterization of Java Virtual Machine Energy and Power Behavior. IISWC 2006: 29-38 | |
| 86 | James Donald, Margaret Martonosi: Techniques for Multicore Thermal Management: Classification and New Exploration. ISCA 2006: 78-88 | |
| 85 | James Donald, Margaret Martonosi: Power efficiency for variation-tolerant multicore processors. ISLPED 2006: 304-309 | |
| 84 | Margaret Martonosi: Embedded systems in the wild: ZebraNet software, hardware, and deployment experiences. LCTES 2006: 1 | |
| 83 | Yong Wang, Margaret Martonosi, Li-Shiuan Peh: Situation-Aware Caching Strategies in Highly Varying Mobile Networks. MASCOTS 2006: 265-274 | |
| 82 | Canturk Isci, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose, Margaret Martonosi: An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget. MICRO 2006: 347-358 | |
| 81 | Canturk Isci, Gilberto Contreras, Margaret Martonosi: Live, Runtime Phase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management. MICRO 2006: 359-370 | |
| 80 | Pei Zhang, Christopher M. Sadler, Margaret Martonosi: Middleware for long-term deployment of delay-tolerant sensor networks. MidSens 2006: 13-18 | |
| 79 | Christopher M. Sadler, Margaret Martonosi: Data compression algorithms for energy-constrained devices in delay tolerant networks. SenSys 2006: 265-278 | |
| 78 | Pei Zhang, Margaret Martonosi: Energy adaptation techniques to optimize data delivery in store-and-forward sensor networks. SenSys 2006: 405-406 | |
| 77 | James Donald, Margaret Martonosi: An Efficient, Practical Parallelization Methodology for Multicore Architecture Simulation. Computer Architecture Letters 5(2): (2006) | |
| 76 | Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks: Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance. IEEE Micro 26(1): 119-129 (2006) | |
| 2005 | ||
| 75 | Fen Xie, Margaret Martonosi, Sharad Malik: Efficient behavior-driven runtime dynamic voltage scaling policies. CODES+ISSS 2005: 105-110 | |
| 74 | Qiang Wu, Philo Juang, Margaret Martonosi, Douglas W. Clark: Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors. HPCA 2005: 178-189 | |
| 73 | Philo Juang, Qiang Wu, Li-Shiuan Peh, Margaret Martonosi, Douglas W. Clark: Coordinated, distributed, formal energy management of chip multiprocessors. ISLPED 2005: 127-130 | |
| 72 | Gilberto Contreras, Margaret Martonosi: Power prediction for intel XScale processors using performance monitoring unit events. ISLPED 2005: 221-226 | |
| 71 | Fen Xie, Margaret Martonosi, Sharad Malik: Bounds on power savings using runtime dynamic voltage scaling: an exact algorithm and a linear-time heuristic approximation. ISLPED 2005: 287-292 | |
| 70 | Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks: A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. MICRO 2005: 271-282 | |
| 69 | Yong Wang, Margaret Martonosi, Li-Shiuan Peh: A new scheme on link quality prediction and its applications to metric-based routing. SenSys 2005: 288-289 | |
| 68 | Canturk Isci, Alper Buyuktosunoglu, Margaret Martonosi: Long-Term Workload Phases: Duration Predictions and Applications to DVFS. IEEE Micro 25(5): 39-51 (2005) | |
| 67 | Qiang Wu, Philo Juang, Margaret Martonosi, Li-Shiuan Peh, Douglas W. Clark: Formal Control Techniques for Power-Performance Management. IEEE Micro 25(5): 52-62 (2005) | |
| 66 | Julia Chen, Philo Juang, Kevin Ko, Gilberto Contreras, David Penry, Ram Rangan, Adam Stoler, Li-Shiuan Peh, Margaret Martonosi: Hardware-modulated parallelism in chip multiprocessors. SIGARCH Computer Architecture News 33(4): 54-63 (2005) | |
| 2004 | ||
| 65 | Qiang Wu, Philo Juang, Margaret Martonosi, Douglas W. Clark: Formal online methods for voltage/frequency control in multiple clock domain microprocessors. ASPLOS 2004: 248-259 | |
| 64 | Russ Joseph, Zhigang Hu, Margaret Martonosi: Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Based dI/dt Characterization. HPCA 2004: 36-47 | |
| 63 | Russ Joseph, Margaret Martonosi, Zhigang Hu: Spectral analysis for characterizing program power and performance. ISPASS 2004: 151-160 | |
| 62 | Gilberto Contreras, Margaret Martonosi, Jinzhan Peng, Roy Ju, Guei-Yuan Lueh: XTREM: a power simulator for the Intel XScale® core. LCTES 2004: 115-125 | |
| 61 | Ting Liu, Christopher M. Sadler, Pei Zhang, Margaret Martonosi: Implementing Software on Resource-Constrained Mobile Sensors: Experiences with Impala and ZebraNet. MobiSys 2004 | |
| 60 | Pei Zhang, Christopher M. Sadler, Stephen A. Lyon, Margaret Martonosi: Hardware design experiences in ZebraNet. SenSys 2004: 227-238 | |
| 59 | Yong Wang, Margaret Martonosi, Li-Shiuan Peh: MARio: mobility-adaptive routing using route lifetime abstractions in mobile ad hoc networks. Mobile Computing and Communications Review 8(4): 77-81 (2004) | |
| 58 | David Brooks, Pradip Bose, Margaret Martonosi: Power-performance simulation: design and validation strategies. SIGMETRICS Performance Evaluation Review 31(4): 13-18 (2004) | |
| 57 | Philo Juang, Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Phil Diodato, Stefanos Kaxiras: Implementing branch-predictor decay using quasi-static memory cells. TACO 1(2): 180-219 (2004) | |
| 56 | Fen Xie, Margaret Martonosi, Sharad Malik: Intraprogram dynamic voltage scaling: Bounding opportunities with analytic modeling. TACO 1(3): 323-367 (2004) | |
| 2003 | ||
| 55 | Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras: TCP: Tag Correlating Prefetchers. HPCA 2003: 317-326 | |
| 54 | Russ Joseph, David Brooks, Margaret Martonosi: Control Techniques to Eliminate Voltage Emergencies in High Performance Processors. HPCA 2003: 79-90 | |
| 53 | Canturk Isci, Margaret Martonosi: Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data. MICRO 2003: 93-104 | |
| 52 | Fen Xie, Margaret Martonosi, Sharad Malik: Compile-time dynamic voltage scaling settings: opportunities and limits. PLDI 2003: 49-62 | |
| 51 | Ting Liu, Margaret Martonosi: Impala: a middleware system for managing autonomic, parallel sensor systems. PPOPP 2003: 107-118 | |
| 50 | Kevin Skadron, Margaret Martonosi, David I. August, Mark D. Hill, David J. Lilja, Vijay S. Pai: Challenges in Computer Architecture Evaluation. IEEE Computer 36(8): 30-36 (2003) | |
| 2002 | ||
| 49 | Philo Juang, Hidekazu Oki, Yong Wang, Margaret Martonosi, Li-Shiuan Peh, Daniel Rubenstein: Energy-efficient computing for wildlife tracking: design tradeoffs and early experiences with ZebraNet. ASPLOS 2002: 96-107 | |
| 48 | Zhigang Hu, Philo Juang, Kevin Skadron, Douglas W. Clark, Margaret Martonosi: Applying Decay Strategies to Branch Predictors for Leakage Energy Savings. ICCD 2002: 442-445 | |
| 47 | Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras: Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior. ISCA 2002: 209-220 | |
| 46 | Zhigang Hu, Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Margaret Martonosi, Douglas W. Clark: Managing leakage for transient data: decay and quasi-static 4T memory cells. ISLPED 2002: 52-55 | |
| 45 | Zhigang Hu, Stefanos Kaxiras, Margaret Martonosi: Let caches decay: reducing leakage energy via exploitation of cache generational behavior. ACM Trans. Comput. Syst. 20(2): 161-190 (2002) | |
| 44 | Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Zhigang Hu, Margaret Martonosi, Douglas W. Clark: Implementing Decay Techniques using 4T Quasi-Static Memory Cells. Computer Architecture Letters 1: (2002) | |
| 2001 | ||
| 43 | David Brooks, Margaret Martonosi: Dynamic Thermal Management for High-Performance Microprocessors. HPCA 2001: 171- | |
| 42 | Stefanos Kaxiras, Zhigang Hu, Margaret Martonosi: Cache decay: exploiting generational behavior to reduce cache leakage power. ISCA 2001: 240-251 | |
| 41 | Russ Joseph, Margaret Martonosi: Run-time power estimation in high performance microprocessors. ISLPED 2001: 135-140 | |
| 40 | Hongli Zhang, Margaret Martonosi: A Mathematical Cache Miss Analysis for Pointer Data Structures. PPSC 2001 | |
| 2000 | ||
| 39 | Darko Stefanovic, Margaret Martonosi: Limits and Graph Structure of Available Instruction-Level Parallelism (Research Note). Euro-Par 2000: 1018-1022 | |
| 38 | Darko Stefanovic, Margaret Martonosi: On Availability of Bit-Narrow Operations in General-Purpose Applications. FPL 2000: 412-421 | |
| 37 | Somnath Ghosh, Margaret Martonosi, Sharad Malik: Automated cache optimizations using CME driven diagnosis. ICS 2000: 316-326 | |
| 36 | Kevin Skadron, Margaret Martonosi, Douglas W. Clark: A Taxonomy of Branch Mispredictions, and Alloyed Prediction as a Robust Solution to Wrong-History Mispredictions. IEEE PACT 2000: 199-206 | |
| 35 | Xianfeng Zhou, Margaret Martonosi: Augmenting Modern Superscalar Architectures with Configurable Extended Instructions. IPDPS Workshops 2000: 941-950 | |
| 34 | David Brooks, Vivek Tiwari, Margaret Martonosi: Wattch: a framework for architectural-level power analysis and optimizations. ISCA 2000: 83-94 | |
| 33 | David Brooks, Margaret Martonosi, John-David Wellman, Pradip Bose: Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor. PACS 2000: 126-136 | |
| 32 | David Brooks, Margaret Martonosi: Value-based clock gating and operation packing: dynamic strategies for improving processor power and performance. ACM Trans. Comput. Syst. 18(2): 89-126 (2000) | |
| 31 | Per Stenström, Erik Hagersten, David J. Lilja, Margaret Martonosi, Madan Venugopal: Shared-memory multiprocessing: Current state and future directions. Advances in Computers 53: 2-55 (2000) | |
| 30 | Zhen Luo, Margaret Martonosi: Accelerating Pipelined Integer and Floating-Point Accumulations in Configurable Hardware with Delayed Addition Techniques. IEEE Trans. Computers 49(3): 208-218 (2000) | |
| 29 | Kevin Skadron, Margaret Martonosi, Douglas W. Clark: Speculative Updates of Local and Global Branch History: A Quantitative Analysis. J. Instruction-Level Parallelism 2: (2000) | |
| 1999 | ||
| 28 | David Brooks, Margaret Martonosi: Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware. CANPC 1999: 181-195 | |
| 27 | Zhen Luo, Margaret Martonosi, Pranav Ashar: An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI CAD Layout Design Rule Checking. FCCM 1999: 158-167 | |
| 26 | David Brooks, Margaret Martonosi: Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance. HPCA 1999: 13-22 | |
| 25 | Cheng Liao, Margaret Martonosi, Douglas W. Clark: An Adaptive Globally-Synchronizing Clock Algorithm and its Implementation on a Myrinet-based PC Cluster. SIGMETRICS 1999: 200-201 | |
| 24 | Cheng Liao, Margaret Martonosi, Douglas W. Clark: Experience with an Adaptive Globally-Synchronizing Clock Algorithm. SPAA 1999: 106-114 | |
| 23 | Somnath Ghosh, Margaret Martonosi, Sharad Malik: Cache miss equations: a compiler framework for analyzing and tuning memory behavior. ACM Trans. Program. Lang. Syst. 21(4): 703-746 (1999) | |
| 22 | Kevin Skadron, Pritpal A. Ahuja, Margaret Martonosi, Douglas W. Clark: Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques. IEEE Trans. Computers 48(11): 1260-1281 (1999) | |
| 21 | Peixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik: Using configurable computing to accelerate Boolean satisfiability. IEEE Trans. on CAD of Integrated Circuits and Systems 18(6): 861-868 (1999) | |
| 1998 | ||
| 20 | Somnath Ghosh, Margaret Martonosi, Sharad Malik: Precise Miss Analysis for Program Transformations with Caches of Arbitrary Associativity. ASPLOS 1998: 228-239 | |
| 19 | Peixin Zhong, Pranav Ashar, Sharad Malik, Margaret Martonosi: Using Reconfigurable Computing Techniques to Accelerate Problems in the CAD Domain: A Case Study with Boolean Satisfiability. DAC 1998: 194-199 | |
| 18 | Peixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik: Accelerating Boolean Satisfiability with Configurable Hardware. FCCM 1998: 186-195 | |
| 17 | Peixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik: Solving Boolean Satisfiability with Dynamic Hardware Configurations. FPL 1998: 326-335 | |
| 16 | Matthias A. Blumrich, Richard Alpert, Yuqun Chen, Douglas W. Clark, Stefanos N. Damianakis, Cezary Dubnicki, Edward W. Felten, Liviu Iftode, Kai Li, Margaret Martonosi, Robert A. Shillner: Design Choices in the SHRIMP System: An Empirical Study. ISCA 1998: 330-341 | |
| 15 | Pritpal S. Ahuja, Kevin Skadron, Margaret Martonosi, Douglas W. Clark: Multipath Execution: Opportunities and Limits. International Conference on Supercomputing 1998: 101-108 | |
| 14 | Cheng Liao, Dongming Jiang, Liviu Iftode, Margaret Martonosi, Douglas W. Clark: Monitoring Shared Virtual Memory Performance on a Myrinet-based PC Cluster. International Conference on Supercomputing 1998: 251-258 | |
| 13 | Kevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, Douglas W. Clark: Improving Prediction for Procedure Returns with Return-address-stack Repair Mechanisms. MICRO 1998: 259-271 | |
| 12 | Mark Horowitz, Margaret Martonosi, Todd C. Mowry, Michael D. Smith: Informing Memory Operations: Memory Performance Feedback Mechanisms and Their Applications. ACM Trans. Comput. Syst. 16(2): 170-205 (1998) | |
| 11 | Mary W. Hall, Margaret Martonosi: Adaptive parallelism in compiler-parallelized code. Concurrency - Practice and Experience 10(14): 1235-1250 (1998) | |
| 1997 | ||
| 10 | Sharad Malik, Margaret Martonosi, Yau-Tsun Steven Li: Static Timing Analysis of Embedded Software. DAC 1997: 147-152 | |
| 9 | Somnath Ghosh, Margaret Martonosi, Sharad Malik: Cache Miss Equations: An Analytical Representation of Cache Misses. International Conference on Supercomputing 1997: 317-324 | |
| 8 | Per Stenström, Erik Hagersten, David J. Lilja, Margaret Martonosi, Madan Venugopal: Trends in Shared Memory Multiprocessing. IEEE Computer 30(12): 44-50 (1997) | |
| 1996 | ||
| 7 | Mark Horowitz, Margaret Martonosi, Todd C. Mowry, Michael D. Smith: Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors. ISCA 1996: 260-270 | |
| 6 | Margaret Martonosi, David Ofelt, Mark Heinrich: Integrating Performance Monitoring and Communication in Parallel Computers. SIGMETRICS 1996: 138-147 | |
| 5 | Evan Torrie, Margaret Martonosi, Chau-Wen Tseng, Mary W. Hall: Characterizing the Memory Behavior of Compiler-Parallelized Applications. IEEE Trans. Parallel Distrib. Syst. 7(12): 1224-1237 (1996) | |
| 1995 | ||
| 4 | Margaret Martonosi, Anoop Gupta, Thomas E. Anderson: Tuning Memory Performance of Sequential and Parallel Programs. IEEE Computer 28(4): 32-40 (1995) | |
| 1993 | ||
| 3 | Margaret Martonosi, Anoop Gupta, Thomas E. Anderson: Effectiveness of Trace Sampling for Performance Debugging Tools. SIGMETRICS 1993: 248-259 | |
| 1992 | ||
| 2 | Margaret Martonosi, Anoop Gupta, Thomas E. Anderson: MemSpy: Analyzing Memory System Bottlenecks in Programs. SIGMETRICS 1992: 1-12 | |
| 1989 | ||
| 1 | Margaret Martonosi, Anoop Gupta: Tradeoffs in Message Passing and Shared Memory Implementations of a Standard Cell Router. ICPP (3) 1989: 88-96 | |