| 2009 | ||
|---|---|---|
| 42 | Maurizio Martina, Guido Masera: Turbo NOC: a framework for the design of Network On Chip based turbo decoder architectures CoRR abs/0909.1876: (2009) | |
| 41 | Maurizio Martina, Mario Nicola, Guido Masera: Vlsi Implementation of WiMAX Convolutional Turbo Code Encoder and Decoder. Journal of Circuits, Systems, and Computers 18(3): 535-564 (2009) | |
| 40 | Andrea Molino, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Terreno, Giorgio Pasquettaz, Giuseppe D'Angelo: FPGA implementation of time-frequency analysis algorithms for laser welding monitoring. Microprocessors and Microsystems - Embedded Hardware Design 33(3): 179-190 (2009) | |
| 2008 | ||
| 39 | Simone Zezza, Guido Masera: VLSI implementation of SISO arithmetic decoders for joint source channel coding. DATE 2008: 1075-1078 | |
| 38 | Simone Zezza, Maurizio Martina, Guido Masera, Saeid Nooshabadi: Error resilient JPEG2000 decoding for wireless applications. ICIP 2008: 2016-2019 | |
| 2007 | ||
| 37 | Maurizio Martina, Andrea Terreno, Fabrizio Vacca, Andrea Molino, Guido Masera, Giuseppe D'Angelo, Giorgio Pasquettaz: Real-time implementation of a time-frequency analysis scheme. ACM Great Lakes Symposium on VLSI 2007: 180-183 | |
| 36 | Maurizio Martina, Guido Masera: Flexible blocks for high throughput serially concatenated convolutional codes. ACM Great Lakes Symposium on VLSI 2007: 184-187 | |
| 35 | Barbara Cerato, Guido Masera, Peter Nilsson: Hardware architecture for matrix factorization in mimo receivers. ACM Great Lakes Symposium on VLSI 2007: 196-199 | |
| 34 | Alberto Dassatti, Simone Zezza, Mario Nicola, Guido Masera: Beyond 3G wireless communication system prototype. ACM Great Lakes Symposium on VLSI 2007: 335-340 | |
| 33 | Paolo Bernardi, Guido Masera, Federico Quaglio, Matteo Sonza Reorda: Testing Logic Cores using a BIST P1500 Compliant Approach: A Case of Study CoRR abs/0710.4840: (2007) | |
| 32 | Barbara Cerato, Guido Masera, Emanuele Viterbo: Decoding the Golden Code: a VLSI design CoRR abs/0711.2383: (2007) | |
| 2006 | ||
| 31 | Federico Quaglio, Fabrizio Vacca, Cristiano Castellano, Alberto Tarable, Guido Masera: Interconnection framework for high-throughput, flexible LDPC decoders. DATE Designers' Forum 2006: 124-129 | |
| 30 | Maurizio Martina, Guido Masera, Andrea Molino, Fabrizio Vacca, Luca Sterpone, Massimo Violante: A new approach to compress the configuration information of programmable devices. DATE Designers' Forum 2006: 48-51 | |
| 29 | Giorgio Pioppo, Rashid Ansari, Ashfaq A. Khokhar, Guido Masera: Low-Complexity Video Compression Combining Adaptive Multifoveation and Reuse of High-Resolution Information. ICIP 2006: 3153-3156 | |
| 28 | Simone Zezza, Marco Grangetto, Maurizio Martina, Fabrizio Vacca, Guido Masera: Error correcting arithmetic coding for JPEG 2000: memory and performance analysis. MobiMedia 2006: 3 | |
| 27 | Mario Nicola, Alberto Dassatti, Guido Masera, Andrea Concil, Angelo Poloni: Mixed hardware-software testbed for IEEE-802.11n. TRIDENTCOM 2006 | |
| 26 | Maurizio Martina, Guido Masera: Mumford and Shah Functional: VLSI Analysis and Implementation. IEEE Trans. Pattern Anal. Mach. Intell. 28(3): 487-494 (2006) | |
| 2005 | ||
| 25 | Alberto Dassatti, Guido Masera, Mario Nicola, Andrea Concil, Angelo Poloni: High Performance Channel Model Hardware Emulator for 802.11n. FPT 2005: 303-304 | |
| 24 | Maurizio Martina, Guido Masera: Low-complexity, efficient 9/7 wavelet filters implementation. ICIP (3) 2005: 1000-1003 | |
| 23 | Andrea Molino, Fabrizio Vacca, Guido Masera: Optimized CORDIC core for frequency-domain motion estimation. ICIP (3) 2005: 1072-1075 | |
| 2004 | ||
| 22 | Paolo Bernardi, Guido Masera, Federico Quaglio, Matteo Sonza Reorda: Testing Logic Cores using a BIST P1500 Compliant Approach: A Case of Study. DATE 2004: 228-233 | |
| 21 | Paolo Bernardi, Guido Masera, Federico Quaglio, Matteo Sonza Reorda: Testing Logic Cores using a BIST P1500 Compliant Approach: A Case of Study. DATE 2004: 228-233 | |
| 20 | Maurizio Martina, Guido Masera: A statistical model for estimating the effect of process variations on crosstalk noise. SLIP 2004: 115-120 | |
| 19 | Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: An electromigration and thermal model of power wires for a priori high-level reliability prediction. IEEE Trans. VLSI Syst. 12(4): 349-358 (2004) | |
| 18 | Mariagrazia Graziano, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Effects of temperature in deep-submicron global interconnect optimization in future technology nodes. Microelectronics Journal 35(10): 849-857 (2004) | |
| 2003 | ||
| 17 | Federico Quaglio, Maurizio Martina, Fabrizio Vacca, Guido Masera, Andrea Molino, Gianluca Piccinini, Maurizio Zamboni: Wireless sensor networks: a power-scalable motion estimation IP for hybrid video coding. FPGA 2003: 246 | |
| 16 | M. Addino, Mario R. Casu, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: A Block-Based Approach for SoC Global Interconnect Electrical Parameters Characterization. PATMOS 2003: 121-130 | |
| 15 | Mario R. Casu, Mariagrazia Graziano, Gianluca Piccinini, Guido Masera, Maurizio Zamboni: Effects of Temperature in Deep-Submicron Global Interconnect Optimization. PATMOS 2003: 90-100 | |
| 14 | Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Coupled electro-thermal modeling and optimization of clock networks. Microelectronics Journal 34(12): 1175-1185 (2003) | |
| 13 | Maurizio Martina, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Novel JPEG 2000 Compliant DWT and IWT VLSI Implementations. VLSI Signal Processing 35(2): 137-153 (2003) | |
| 2002 | ||
| 12 | Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni: Energy Evaluation on a Reconfigurable, Multimedia-Oriented Wireless Sensor. FPL 2002: 332-339 | |
| 11 | Mario R. Casu, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, M. M. Prono, Maurizio Zamboni: Clock Distribution Network Optimization under Self-Heating and Timing Constraints. PATMOS 2002: 198-208 | |
| 10 | Guido Masera, M. Mazza, Gianluca Piccinini, F. Viglione, Maurizio Zamboni: Architectural strategies for low-power VLSI turbo decoders. IEEE Trans. VLSI Syst. 10(3): 279-285 (2002) | |
| 2001 | ||
| 9 | Mario R. Casu, Gianluca Piccinini, Guido Masera, Maurizio Zamboni: Synthesis of low-leakage PD-SOI circuits with body-biasing. ISLPED 2001: 287-290 | |
| 8 | Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Hierarchical power supply noise evaluation for early power grid design prediction. SLIP 2001: 183-188 | |
| 7 | Marco Delaurenti, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Switching Noise Analysis Framework For High Speed Logic Families. VLSI Design 2001: 524-530 | |
| 2000 | ||
| 6 | F. Viglione, Guido Masera, Gianluca Piccinini, M. Ruo Roch, Maurizio Zamboni: A 50 Mbit/s Iterative Turbo-Decoder. DATE 2000: 176-180 | |
| 5 | Mariagrazia Graziano, Marco Delaurenti, Guido Masera, Gianluca Piccinini, Maurizio Zamboni: Noise Safety Design Methodologies. ISQED 2000: 157- | |
| 1999 | ||
| 4 | Guido Masera, Gianluca Piccinini, M. Ruo Roch, Maurizio Zamboni: A Quantitative Approach to the Design of an Optimized Hardware Interpreter for Java Byte-Code. Applied Informatics 1999: 51-54 | |
| 3 | Guido Masera, Gianluca Piccinini, Massimo Ruo Roth, Maurizio Zamboni: New 2 Gbit/s CMOS I/O pads. Great Lakes Symposium on VLSI 1999: 82-85 | |
| 2 | Guido Masera, Gianluca Piccinini, M. Ruo Roch, Maurizio Zamboni: VLSI architectures for turbo codes. IEEE Trans. VLSI Syst. 7(3): 369-379 (1999) | |
| 1996 | ||
| 1 | Mariana-Eugenia Petre, Guido Masera: A Parametrical Architecture for Reed-Solomon Decoders. Great Lakes Symposium on VLSI 1996: 81- | |