Sanu Mathew Coauthor index DBLP Vis pubzone.org

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DBLP keys2009
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSuresh Srinivasan, Sanu Mathew, Vasantha Erraguntla, Ram Krishnamurthy: A 4Gbps 0.57pJ/bit Process-Voltage-Temperature Variation Tolerant All-Digital True Random Number Generator in 45nm CMOS. VLSI Design 2009: 301-306
2008
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRajaraman Ramanarayanan, Sanu Mathew, Vasantha Erraguntla, Ram Krishnamurthy, Shay Gueron: A 2.1GHz 6.5mW 64-bit Unified PopCount/BitScan Datapath Unit for 65nm High-Performance Microprocessor Execution Cores. VLSI Design 2008: 273-278
2005
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDavid Harris, Ram Krishnamurthy, Mark Anders, Sanu Mathew, Steven Hsu: An Improved Unified Scalable Radix-2 Montgomery Multiplier. IEEE Symposium on Computer Arithmetic 2005: 172-178
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu Mathew, Ram Krishnamurthy: Comparison of high-performance VLSI adders in the energy-delay space. IEEE Trans. VLSI Syst. 13(6): 754-758 (2005)
2003
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu Mathew, Ram Krishnamurthy: Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders. IEEE Symposium on Computer Arithmetic 2003: 272-279

Coauthor Index

1Mark Anders [3]
2Hoang Q. Dao [1] [2]
3Vasantha Erraguntla [4] [5]
4Shay Gueron [4]
5David Harris [3]
6Steven Hsu [3]
7Ram Krishnamurthy [1] [2] [3] [4] [5]
8Vojin G. Oklobdzija [1] [2]
9Rajaraman Ramanarayanan [4]
10Suresh Srinivasan [5]
11Bart R. Zeydel [1] [2]

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