 | 2006 |
| 28 |  | Robert D. McLeod,
Sajid Hussain,
Sheng Huang,
Marek Laskowski:
Communication issues within high performance computing grids.
IJHPCN 4(5/6): 248-255 (2006) |
| 2004 |
| 27 |  | Robert D. McLeod,
Sheng Huang,
Marek Laskowski,
Sajid Hussain:
Communication Issues within HPC Grids.
HPCS 2004: 101-107 |
| 26 |  | Robert D. McLeod,
Dong Zhang,
Sajid Hussain:
iSCSI Simulation for Internet Applications.
International Conference on Internet Computing 2004: 285-289 |
| 2002 |
| 25 |  | Sajid Huang,
Robert D. McLeod:
Adaptive Network Load Balancing in Phatpackets.
Communications, Internet, and Information Technology 2002: 154-159 |
| 24 |  | S. Huang,
Robert D. McLeod:
Phatpackets for Data Transport within an HPC Network.
IASTED PDCS 2002: 154-160 |
| 2000 |
| 23 |  | Babk S. Noghani,
Steve Kretschmann,
Robert D. McLeod:
Reducing Latency on the Internet using "Component-Based Download" and "File-Segment Transfer Protocol".
International Conference on Internet Computing 2000: 465-472 |
| 1999 |
| 22 |  | C. Hart Poskar,
Peter J. Czezowski,
Robert D. McLeod:
A Computational Intelligence Based Coarse-Grained Reconfigurable Element.
FPGA 1999: 246 |
| 1998 |
| 21 |  | Howard C. Card,
G. K. Rosendahl,
Dean K. McNeill,
Robert D. McLeod:
Competitive Learning Algorithms and Neurocomputer Architecture.
IEEE Trans. Computers 47(8): 847-858 (1998) |
| 20 |  | G. K. Rosendahl,
Robert D. McLeod,
Howard C. Card:
A DSP-FPGA-Based Reconfigurable Computer.
Journal of Circuits, Systems, and Computers 8(4): 453-459 (1998) |
| 1996 |
| 19 |  | Zaifu Zhang,
Robert D. McLeod:
An Efficient Multiple Scan Chain Testing Scheme.
Great Lakes Symposium on VLSI 1996: 294- |
| 18 |  | Zaifu Zhang,
Robert D. McLeod,
Gregory E. Bridges:
Statistical estimation of delay fault detectabilities and fault grading.
J. Electronic Testing 8(1): 47-60 (1996) |
| 1995 |
| 17 |  | Richard W. Wieler,
Zaifu Zhang,
Robert D. McLeod:
Emulating static faults using a Xilinx based emulator.
FCCM 1995: 110-115 |
| 16 |  | Zaifu Zhang,
Robert D. McLeod,
Gregory E. Bridges:
Statistical estimation of delay fault detectabilities and fault grading.
Great Lakes Symposium on VLSI 1995: 184-187 |
| 1994 |
| 15 |  | Zaifu Zhang,
Robert D. McLeod,
Witold Pedrycz:
Augmenting Scan Path SRLs with an XOR Network to Enhance Delay Fault Testing.
DFT 1994: 55-64 |
| 14 |  | Richard W. Wieler,
Zaifu Zhang,
Robert D. McLeod:
Simulating Static and Dynamic Faults in BIST Strucutres with a FPGA Based Emulator.
FPL 1994: 240-250 |
| 13 |  | R. V. Pelletier,
Robert D. McLeod:
Loop based design for wafer scale systems.
IEEE Trans. VLSI Syst. 2(3): 354-357 (1994) |
| 1993 |
| 12 |  | C. Sul,
Robert D. McLeod,
Witold Pedrycz:
Reliable and fast reconfigurable hierarchical interconnection networks for linear WSI arrays.
IEEE Trans. VLSI Syst. 1(2): 224-228 (1993) |
| 11 |  | David C. Blight,
Robert D. McLeod:
An adaptive message passing environment for water scale systems.
IEEE Trans. VLSI Syst. 1(4): 559-562 (1993) |
| 10 |  | Zaifu Zhang,
Robert D. McLeod,
Witold Pedrycz:
A neural network algorithm for testing stuck-open faults in CMOS combinational circuits.
J. Electronic Testing 4(3): 225-235 (1993) |
| 1992 |
| 9 |  | David C. Blight,
Robert D. McLeod:
Self-Organizing Kohonen Maps for FPL Placement.
FPL 1992: 88-95 |
| 1990 |
| 8 |  | Peter D. Hortensius,
Robert D. McLeod,
Howard C. Card:
Cellular Automata-Based Signature analysis for Built-in Self-Test.
IEEE Trans. Computers 39(10): 1273-1283 (1990) |
| 7 |  | Robert D. McLeod,
J. J. Schellenberg,
Peter D. Hortensius:
Percolation and Anomalous Transport as Tools in Analyzing Parallel Processing Interconnection Networks.
J. Parallel Distrib. Comput. 8(4): 376-387 (1990) |
| 1989 |
| 6 |  | Peter D. Hortensius,
Robert D. McLeod,
Howard C. Card:
Parallel Random Number Generation for VLSI Systems Using Cellular Automata.
IEEE Trans. Computers 38(10): 1466-1473 (1989) |
| 5 |  | Peter D. Hortensius,
Howard C. Card,
Robert D. McLeod,
Werner Pries:
Importance Sampling for Ising Computers Using One-Dimensional Cellular Automata.
IEEE Trans. Computers 38(6): 769-774 (1989) |
| 4 |  | Peter D. Hortensius,
Robert D. McLeod,
Werner Pries,
D. M. Miller,
Howard C. Card:
Cellular automata-based pseudorandom number generators for built-in self-test.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(8): 842-859 (1989) |
| 1987 |
| 3 |  | Howard C. Card,
P. Glenn Gulak,
Robert D. McLeod,
Werner Pries:
(lambda, T) Complexity Measures for VLSI Computations in Constant Chip Area.
IEEE Trans. Computers 36(1): 112-117 (1987) |
| 1986 |
| 2 |  | Gregory E. Bridges,
Werner Pries,
Robert D. McLeod,
M. Yunik,
P. Glenn Gulak,
Howard C. Card:
Dual Systolic Architectures for VLSI Digital Signal Processing Systems.
IEEE Trans. Computers 35(10): 916-923 (1986) |
| 1 |  | Howard C. Card,
Adonios Thanailakis,
Werner Pries,
Robert D. McLeod:
Analysis of Bounded Linear Cellular Automata Based on a Method of Image Charges.
J. Comput. Syst. Sci. 33(3): 473-480 (1986) |