Hortensia Mecha Coauthor index DBLP Vis pubzone.org

List of publications from the DBLP Bibliography Server - FAQ
Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo

DBLP keys2009
19Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJose Antonio Valero, Julio Septién, Daniel Mozos, Hortensia Mecha: 3D FPGA resource management and fragmentation metric for hardware multitasking. IPDPS 2009: 1-7
2008
18no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAngel Luis González Bravo, Hortensia Mecha, Julio Septién, Sara Román Navarro, Daniel Mozos: Synthesis of relocatable tasks and implementation of a task communication bus in a general purpose Hw system. ERSA 2008: 307-308
17no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLaura Sanchez, Julio Septién, Daniel Mozos, Hortensia Mecha, Angel Luis González Bravo: FPGA Resource Management Using Internal RAM as Aata Cache. ERSA 2008: 317-318
16no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJose Antonio Valero, Julio Septién, Daniel Mozos, Hortensia Mecha, Angel Luis González Bravo: Resource Management for Hw Multitasking in Three Dimensional FPGAs. ERSA 2008: 319-320
15Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJulio Septién, Daniel Mozos, Hortensia Mecha, Jesús Tabero, Miguel Angel García de Dios: Perimeter quadrature-based metric for estimating FPGA fragmentation in 2D HW multitasking. IPDPS 2008: 1-8
14Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJesús Tabero, Julio Septién, Hortensia Mecha, Daniel Mozos: Allocation heuristics and defragmentation measures for reconfigurable systems management. Integration 41(2): 281-296 (2008)
2006
13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSara Román Navarro, Julio Septién, Hortensia Mecha, Daniel Mozos: Constant Complexity Management of 2D HW Multitasking in Run-Time Reconfigurable FPGAs. ARC 2006: 187-192
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJesús Tabero, Julio Septién, Hortensia Mecha, Daniel Mozos: Task placement heuristic based on 3D-adjacency and look-ahead in reconfigurable systems. ASP-DAC 2006: 396-401
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSara Román Navarro, Hortensia Mecha, Daniel Mozos, Julio Septién: Partition Based Dynamic 2D HW Multitasking Management. DSD 2006: 61-70
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJulio Septién, Hortensia Mecha, Daniel Mozos, Jesús Tabero: 2D defragmentation heuristics for hardware multitasking on reconfigurable devices. IPDPS 2006
2004
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJesús Tabero, Julio Septién, Hortensia Mecha, Daniel Mozos: A Low Fragmentation Heuristic for Task Placement in 2D RTR HW Management. FPL 2004: 241-250
2003
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJavier Resano, Daniel Mozos, Elena Pérez-Miñana, Hortensia Mecha, Julio Septién: A Hardware/Software Partitioning and Scheduling Approach for Embedded Systems with Low-Power and High Performance Requirements. PATMOS 2003: 580-589
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJavier Resano, M. Elena Pérez, Daniel Mozos, Hortensia Mecha, Julio Septién: Analyzing communication overheads during hardware/software partitioning. Microelectronics Journal 34(11): 1001-1007 (2003)
1999
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKatzalin Olcoz, Francisco Tirado, Hortensia Mecha: Unified data path allocation and BIST intrusion. Integration 28(1): 55-99 (1999)
1998
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJ. A. Maestro, Daniel Mozos, Hortensia Mecha: A Macroscopic Time and Cost Estimation Model Allowing Task Parallelism and Hardware Sharing for the Codesign Partitioning Process. DATE 1998: 218-225
1997
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHortensia Mecha, Milagros Fernández: Interconnection Delay and Clock Cycle Selection in High Level Synthesis. VLSI Design 1997: 504-505
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLR. Moreno, Román Hermida, Milagros Fernández, Hortensia Mecha: A unified approach for scheduling and allocation. Integration 23(1): 1-35 (1997)
1996
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHortensia Mecha, Milagros Fernández, Francisco Tirado, Julio Septién, D. Motes, Katzalin Olcoz: A method for area estimation of data-path in high level synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 15(2): 258-265 (1996)
1994
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHortensia Mecha, Milagros Fernández, Román Hermida, Daniel Mozos, Katzalin Olcoz: Clock cycle estimation based on dead time and control unit area minimization. Microprocessing and Microprogramming 40(10-12): 821-824 (1994)

Coauthor Index

1Angel Luis González Bravo [16] [17] [18]
2Miguel Angel García de Dios [15]
3Milagros Fernández [1] [2] [3] [4]
4Román Hermida [1] [3]
5J. A. Maestro [5]
6R. Moreno [3]
7D. Motes [2]
8Daniel Mozos [1] [5] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19]
9Sara Román Navarro [11] [13] [18]
10Katzalin Olcoz [1] [2] [6]
11M. Elena Pérez [7]
12Elena Pérez-Miñana [8]
13Javier Resano [7] [8]
14Laura Sanchez [17]
15Julio Septién [2] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19]
16Jesús Tabero [9] [10] [12] [14] [15]
17Francisco Tirado [2] [6]
18Jose Antonio Valero [16] [19]

Copyright © Wed Nov 25 14:46:41 2009 by Michael Ley (ley@uni-trier.de)