 | 2006 |
|---|
| 10 |       | Maurice Meijer,
Rohini Krishnan,
Martijn T. Bennebroek:
Energy-efficient FPGA interconnect design.
DATE Designers' Forum 2006: 42-47 |
| 9 | | Sandeep Kumar Goel,
Maurice Meijer,
José Pineda de Gyvez:
Testing and Diagnosis of Power Switches in SOCs.
European Test Symposium 2006: 145-150 |
| 8 | | Josep Rius,
Maurice Meijer,
José Pineda de Gyvez:
An Activity Monitor for Power/Performance Tuning of CMOS Digital Circuits.
J. Low Power Electronics 2(1): 80-86 (2006) |
| 2005 |
|---|
| 7 | | Maurice Meijer,
Francesco Pessolano,
José Pineda de Gyvez:
Limits to performance spread tuning using adaptive voltage and body biasing.
ISCAS (1) 2005: 5-8 |
| 6 | | Maurice Meijer,
Francesco Pessolano,
José Pineda de Gyvez:
Glitch-free discretely programmable clock generation on chip.
ISCAS (2) 2005: 1839-1842 |
| 5 | | Maurice Meijer,
José Pineda de Gyvez,
Ralph Otten:
On-chip digital power supply control for system-on-chip applications.
ISLPED 2005: 311-314 |
| 4 | | Josep Rius,
José Pineda de Gyvez,
Maurice Meijer:
An Activity Monitor for Power/Performance Tuning of CMOS Digital Circuits.
PATMOS 2005: 187-196 |
| 3 | | Atul Katoch,
Maurice Meijer,
Sanjeev K. Jain:
Active Noise Cancellation Using Aggressor-Aware Clamping Circuit for Robust On-Chip Communication.
VLSI Design 2005: 325-329 |
| 2004 |
|---|
| 2 | | Maurice Meijer,
Francesco Pessolano,
José Pineda de Gyvez:
Technology exploration for adaptive power and frequency scaling in 90nm CMOS.
ISLPED 2004: 14-19 |
| 1 | | André K. Nieuwland,
Atul Katoch,
Maurice Meijer:
Reducing Cross-Talk Induced Power Consumption and Delay.
PATMOS 2004: 179-188 |
