 | 2009 |
|---|
| 13 |       | Albert Meixner,
Daniel J. Sorin:
Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures.
IEEE Trans. Dependable Sec. Comput. 6(1): 18-31 (2009) |
| 2008 |
|---|
| 12 | | Albert Meixner,
Daniel J. Sorin:
Detouring: Translating software to circumvent hard faults in simple cores.
DSN 2008: 80-89 |
| 11 | | Albert Meixner,
Michael E. Bauer,
Daniel J. Sorin:
Argus: Low-Cost, Comprehensive Error Detection in Simple Cores.
IEEE Micro 28(1): 52-59 (2008) |
| 2007 |
|---|
| 10 | | Albert Meixner,
Daniel J. Sorin:
Unified microprocessor core storage.
Conf. Computing Frontiers 2007: 23-34 |
| 9 | | Mahmut Yilmaz,
Albert Meixner,
Sule Ozev,
Daniel J. Sorin:
Lazy Error Detection for Microprocessor Functional Units.
DFT 2007: 361-369 |
| 8 | | Albert Meixner,
Daniel J. Sorin:
Error Detection via Online Checking of Cache Coherence with Token Coherence Signatures.
HPCA 2007: 145-156 |
| 7 | | Albert Meixner,
Michael E. Bauer,
Daniel J. Sorin:
Argus: Low-Cost, Comprehensive Error Detection in Simple Cores.
MICRO 2007: 210-222 |
| 6 | | Albert Meixner,
Daniel J. Sorin:
Error Detection Using Dynamic Dataflow Verification.
PACT 2007: 104-118 |
| 2006 |
|---|
| 5 | | Albert Meixner,
Daniel J. Sorin:
Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures.
DSN 2006: 73-82 |
| 4 | | Albert Meixner,
Andreas Uhl:
Robustness and security of a wavelet-based CBIR hashing algorithm.
MM&Sec 2006: 140-145 |
| 2005 |
|---|
| 3 | | Albert Meixner,
Andreas Uhl:
Security Enhancement of Visual Hashes Through Key Dependent Wavelet Transformations.
ICIAP 2005: 543-550 |
| 2 | | Albert Meixner,
Daniel J. Sorin:
Dynamic Verification of Sequential Consistency.
ISCA 2005: 482-493 |
| 2004 |
|---|
| 1 |  | Albert Meixner,
Andreas Uhl:
Analysis of a wavelet-based robust hash algorithm.
Security, Steganography, and Watermarking of Multimedia Contents 2004: 772-783 |
