Volker Meyer

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2005

2 Ajoy Kumar Palit, Volker Meyer, Walter Anheier, Jürgen Schlöffel: ABCD Modeling of Crosstalk Coupling Noise to Analyze the Signal Integrity Losses on the Victim Interconnect in DSM Chips. VLSI Design 2005: 354-359

2004

1 Ajoy Kumar Palit, Volker Meyer, Walter Anheier, Jürgen Schlöffel: Modeling and Analysis of Crosstalk Coupling Effect on the Victim Interconnect Using the ABCD Network Model. DFT 2004: 174-182

	2005
2		Ajoy Kumar Palit, Volker Meyer, Walter Anheier, Jürgen Schlöffel: ABCD Modeling of Crosstalk Coupling Noise to Analyze the Signal Integrity Losses on the Victim Interconnect in DSM Chips. VLSI Design 2005: 354-359
	2004
1		Ajoy Kumar Palit, Volker Meyer, Walter Anheier, Jürgen Schlöffel: Modeling and Analysis of Crosstalk Coupling Effect on the Victim Interconnect Using the ABCD Network Model. DFT 2004: 174-182

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