Maria K. Michael

	2009
26		Theocharis Theocharides, Maria K. Michael, Marios M. Polycarpou, Ajit Dingankar: Towards embedded runtime system level optimization for MPSoCs: on-chip task allocation. ACM Great Lakes Symposium on VLSI 2009: 121-124
	2008
25		Paolo Bernardi, Kyriakos Christou, Michelangelo Grosso, Maria K. Michael, Ernesto Sánchez, Matteo Sonza Reorda: Exploiting MOEA to Automatically Geneate Test Programs for Path-Delay Faults in Microprocessors. EvoWorkshops 2008: 224-234
24		Stelios Neophytou, Maria K. Michael: Two New Methods for Accurate Test Set Relaxation via Test Set Replacement. ISQED 2008: 827-831
23		Theocharis Theocharides, Maria K. Michael, Marios M. Polycarpou, Ajit Dingankar: A Novel System-Level On-Chip Resource Allocation Method for Manycore Architectures. ISVLSI 2008: 99-104
22		Stelios Neophytou, Maria K. Michael: On the Relaxation of n-detect Test Sets. VTS 2008: 187-192
21		Kyriakos Christou, Maria K. Michael, Paolo Bernardi, Michelangelo Grosso, Ernesto Sánchez, Matteo Sonza Reorda: A Novel SBST Generation Technique for Path-Delay Faults in Microprocessors Exploiting Gate- and RT-Level Descriptions. VTS 2008: 389-394
20		Kyriakos Christou, Maria K. Michael, Spyros Tragoudas: On the Use of ZBDDs for Implicit and Compact Critical Path Delay Fault Test Generation. J. Electronic Testing 24(1-3): 203-222 (2008)
	2007
19		Stelios Neophytou, Maria K. Michael: Hierarchical Fault Compatibility Identification for Test Generation with a Small Number of Specified Bits. DFT 2007: 439-447
18		Rajsekhar Adapa, Spyros Tragoudas, Maria K. Michael: Accelerating Diagnosis via Dominance Relations between Sets of Faults. VTS 2007: 219-224
	2006
17		Kyriakos Christou, Maria K. Michael, Spyros Tragoudas: Implicit Critical PDF Test Generation with Maximal Test Efficiency. DFT 2006: 50-58
16		Stelios Neophytou, Maria K. Michael, Spyros Tragoudas: Efficient Deterministic Test Generation for BIST Schemes with LFSR Reseeding. IOLTS 2006: 43-50
15		Rajsekhar Adapa, Spyros Tragoudas, Maria K. Michael: Sub-faults identification for collapsing in diagnosis. ISCAS 2006
14		Rajsekhar Adapa, Spyros Tragoudas, Maria K. Michael: Evaluation of Collapsing Methods for Fault Diagnosis. ISQED 2006: 439-444
13		Stelios Neophytou, Maria K. Michael, Spyros Tragoudas: Functions for Quality Transition-Fault Tests and Their Applications in Test-Set Enhancement. IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 3026-3035 (2006)
	2005
12		Stelios Neophytou, Maria K. Michael, Spyros Tragoudas: Test set enhancement for quality transition faults using function-based methods. ACM Great Lakes Symposium on VLSI 2005: 182-187
11		Maria K. Michael, Kyriakos Christou, Spyros Tragoudas: Towards finding path delay fault tests with high test efficiency using ZBDDs. ICCD 2005: 464-467
10		Maria K. Michael, Stelios Neophytou, Spyros Tragoudas: Functions for Quality Transition Fault Tests. ISQED 2005: 327-332
9		Maria K. Michael, Spyros Tragoudas: Function-based compact test pattern generation for path delay faults. IEEE Trans. VLSI Syst. 13(8): 996-1001 (2005)
	2004
8		Maria K. Michael, Themistoklis Haniotakis, Spyros Tragoudas: A unified framework for generating all propagation functions for logic errors and events. IEEE Trans. on CAD of Integrated Circuits and Systems 23(6): 980-986 (2004)
	2003
7		Maria K. Michael, Spyros Tragoudas: Generation of Hazard Identification Functions. ISQED 2003: 419-424
6		Saravanan Padmanaban, Maria K. Michael, Spyros Tragoudas: Exact path delay fault coverage with fundamental ZBDD operations. IEEE Trans. on CAD of Integrated Circuits and Systems 22(3): 305-316 (2003)
	2002
5		Maria K. Michael, Spyros Tragoudas: ATPG tools for delay faults at the functional level. ACM Trans. Design Autom. Electr. Syst. 7(1): 33-57 (2002)
	2001
4		Maria K. Michael, Spyros Tragoudas: ATPG for Path Delay Faults without Path Enumeration. ISQED 2001: 384-
3		Saravanan Padmanaban, Maria K. Michael, Spyros Tragoudas: Exact path delay grading with fundamental BDD operations. ITC 2001: 642-651
	1999
2		Spyros Tragoudas, Maria K. Michael: ATPG Tools for Delay Faults at the Functional Level. DATE 1999: 631-
1		Spyros Tragoudas, Maria K. Michael: Functional ATPG for Delay Faults. Great Lakes Symposium on VLSI 1999: 16-19

Coauthor Index

1	Rajsekhar Adapa	[14] [15] [18]
2	Paolo Bernardi	[21] [25]
3	Kyriakos Christou	[11] [17] [20] [21] [25]
4	Ajit Dingankar	[23] [26]
5	Michelangelo Grosso	[21] [25]
6	Themistoklis Haniotakis (Th. Haniotakis)	[8]
7	Stelios Neophytou	[10] [12] [13] [16] [19] [22] [24]
8	Saravanan Padmanaban	[3] [6]
9	Marios M. Polycarpou	[23] [26]
10	Matteo Sonza Reorda	[21] [25]
11	Ernesto Sánchez (Edgar Ernesto Sánchez Sánchez)	[21] [25]
12	Theocharis Theocharides	[23] [26]
13	Spyros Tragoudas	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [20]

Colors in the list of coauthors