Asit K. Mishra Coauthor index DBLP Vis pubzone.org

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4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLReetuparna Das, Soumya Eachempati, Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. Das: Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs. HPCA 2009: 175-186
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLShekhar Srikantaiah, Reetuparna Das, Asit K. Mishra, Chita R. Das, Mahmut T. Kandemir: A case for integrated processor-cache partitioning in chip multiprocessors. SC 2009
2008
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLReetuparna Das, Asit K. Mishra, Chrysostomos Nicopoulos, Dongkook Park, Vijay Narayanan, Ravishankar Iyer, Mazin S. Yousif, Chita R. Das: Performance and power optimization through data compression in Network-on-Chip architectures. HPCA 2008: 215-225
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDongkook Park, Soumya Eachempati, Reetuparna Das, Asit K. Mishra, Yuan Xie, Narayanan Vijaykrishnan, Chita R. Das: MIRA: A Multi-layered On-Chip Interconnect Router Architecture. ISCA 2008: 251-261

Coauthor Index

1Chita R. Das [1] [2] [3] [4]
2Reetuparna Das [1] [2] [3] [4]
3Soumya Eachempati [1] [4]
4Ravishankar Iyer [2]
5Mahmut T. Kandemir [3]
6Vijay Narayanan [2]
7Chrysostomos Nicopoulos [2]
8Dongkook Park [1] [2]
9Shekhar Srikantaiah [3]
10Narayanan Vijaykrishnan (Vijaykrishnan Narayanan) [1] [4]
11Yuan Xie [1]
12Mazin S. Yousif [2]

Copyright © Fri Nov 27 15:43:12 2009 by Michael Ley (ley@uni-trier.de)