Kartik Mohanram

	2009
33		Mihir R. Choudhury, Kartik Mohanram: Timing-driven optimization using lookahead logic circuits. DAC 2009: 390-395
32		M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De Micheli: Novel library of logic gates with ambipolar CNTFETs: Opportunities for multi-level logic synthesis. DATE 2009: 622-627
31		Mihir R. Choudhury, Kartik Mohanram: Masking timing errors on speed-paths in logic circuits. DATE 2009: 87-92
30		Abhishek Garg, Kartik Mohanram, Alessandro Di Cara, Giovanni De Micheli, Ioannis Xenarios: Modeling stochasticity and robustness in gene regulatory networks. Bioinformatics 25(12): (2009)
29		Mihir R. Choudhury, Kartik Mohanram: Reliability Analysis of Logic Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 28(3): 392-405 (2009)
	2008
28		Mihir R. Choudhury, Youngki Yoon, Jing Guo, Kartik Mohanram: Technology exploration for graphene nanoribbon FETs. DAC 2008: 272-277
27		Mihir R. Choudhury, Kartik Mohanram: Approximate logic circuits for low overhead, non-intrusive concurrent error detection. DATE 2008: 903-908
26		Kartik Mohanram: Error Detection and Tolerance for Scaled Electronic Technologies. DFT 2008: 83-83
25		Kartik Mohanram, Jing Guo: Graphene nanoribbon FETs: technology exploration and CAD. ICCAD 2008: 412-415
	2007
24		Mihir R. Choudhury, Kyle Ringgenberg, Scott Rixner, Kartik Mohanram: Interactive presentation: Single-ended coding techniques for off-chip interconnects to commodity memory. DATE 2007: 1072-1077
23		Mihir R. Choudhury, Kartik Mohanram: Accurate and scalable reliability analysis of logic circuits. DATE 2007: 1454-1459
22		Kai Sun, Quming Zhou, Kartik Mohanram, Danny C. Sorensen: Parallel domain decomposition for simulation of large-scale power grids. ICCAD 2007: 54-59
21		Quming Zhou, Lin Zhong, Kartik Mohanram: Power signal processing: a new perspective for power analysis and optimization. ISLPED 2007: 165-170
20		Mosin Mondal, Kartik Mohanram, Yehia Massoud: Parameter-Variation-Aware Analysis for Noise Robustness. ISQED 2007: 655-659
	2006
19		Alan L. Cox, Kartik Mohanram, Scott Rixner: Dependable != unaffordable. ASID 2006: 58-62
18		Quming Zhou, Kartik Mohanram: Elmore model for energy estimation in RC trees. DAC 2006: 965-970
17		Quming Zhou, Kai Sun, Kartik Mohanram, Danny C. Sorensen: Large power grid analysis using domain decomposition. DATE 2006: 27-32
16		Mihir R. Choudhury, Quming Zhou, Kartik Mohanram: Design optimization for single-event upset robustness using simultaneous dual-VDD and sizing techniques. ICCAD 2006: 204-209
15		Quming Zhou, Mihir R. Choudhury, Kartik Mohanram: Design Optimization for Robustness to Single Event Upsets. VTS 2006: 202-207
14		Quming Zhou, Kartik Mohanram: Gate sizing to radiation harden combinational logic. IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 155-166 (2006)
	2005
13		Quming Zhou, Kartik Mohanram, Athanasios C. Antoulas: Structure preserving reduction of frequency-dependent interconnect. DAC 2005: 939-942
12		Kartik Mohanram: Closed-Form Simulation and Robustness Models for SEU-Tolerant Design. VTS 2005: 327-333
	2004
11		Quming Zhou, Kartik Mohanram: Cost-effective radiation hardening technique for combinational logic. ICCAD 2004: 100-106
10		Quming Zhou, Kartik Mohanram: Analysis of delay caused by bridging faults in RLC interconnects. ITC 2004: 1044-1052
9		Kartik Mohanram, Scott Rixner: Context-Independent Codes for Off-Chip Interconnects. PACS 2004: 107-119
8		Kartik Mohanram, Nur A. Touba: Lowering power consumption in concurrent checkers via input ordering. IEEE Trans. VLSI Syst. 12(11): 1234-1243 (2004)
	2003
7		Kartik Mohanram, Nur A. Touba: Partial Error Masking to Reduce Soft Error Failure Rate in Logic Circuits. DFT 2003: 433-
6		Kartik Mohanram, Egor S. Sogomonyan, Michael Gössel, Nur A. Touba: Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits. IOLTS 2003: 35-
5		Kartik Mohanram, Nur A. Touba: Cost-Effective Approach for Reducing Soft Error Failure Rate in Logic Circuits. ITC 2003: 893-901
4		Kartik Mohanram, Nur A. Touba: Eliminating Non-Determinism During Test of High-Speed Source Synchronous Differential Buses. VTS 2003: 121-127
	2002
3		Kartik Mohanram, Nur A. Touba: Input Ordering in Concurrent Checkers to Reduce Power Consumption. DFT 2002: 87-98
2		Kartik Mohanram, C. V. Krishna, Nur A. Touba: A methodology for automated insertion of concurrent error detection hardware in synthesizable Verilog RTL. ISCAS (1) 2002: 577-580
	1999
1		Abhijit Jas, Kartik Mohanram, Nur A. Touba: An Embedded Core DFT Scheme to Obtain Highly Compressed Test Sets. Asian Test Symposium 1999: 275-

Coauthor Index

1	Athanasios C. Antoulas	[13]
2	Alessandro Di Cara	[30]
3	Mihir R. Choudhury	[15] [16] [23] [24] [27] [28] [29] [31] [33]
4	Alan L. Cox	[19]
5	Abhishek Garg	[30]
6	Michael Gössel	[6]
7	Jing Guo	[25] [28]
8	M. Haykel Ben Jamaa	[32]
9	Abhijit Jas	[1]
10	C. V. Krishna	[2]
11	Yehia Massoud	[20]
12	Giovanni De Micheli	[30] [32]
13	Mosin Mondal	[20]
14	Kyle Ringgenberg	[24]
15	Scott Rixner	[9] [19] [24]
16	Egor S. Sogomonyan	[6]
17	Danny C. Sorensen	[17] [22]
18	Kai Sun	[17] [22]
19	Nur A. Touba	[1] [2] [3] [4] [5] [6] [7] [8]
20	Ioannis Xenarios	[30]
21	Youngki Yoon	[28]
22	Lin Zhong	[21]
23	Quming Zhou	[10] [11] [13] [14] [15] [16] [17] [18] [21] [22]

Colors in the list of coauthors