Edward David Moreno Ordonez
List of publications from the DBLP Bibliography Server - FAQ
| 2009 | ||
|---|---|---|
| 11 | Marina L. Gavrilova, Chih Jeng Kenneth Tan, Edward D. Moreno: Transactions on Computational Science IV, Special Issue on Security in Computing Springer 2009 | |
| 10 | Fábio Dacêncio Pereira, Edward David Moreno Ordonez: A Hardware Architecture for Integrated-Security Services. Transactions on Computational Science 4: 215-229 (2009) | |
| 2007 | ||
| 9 | Alexandre Ponce de Oliveira, Edward D. Moreno: Impact of the DES and AES Algorithms on PERS (A Specific Processor for Sensor Networks). ICSNC 2007: 38 | |
| 8 | Kalinka Regina Lucas Jaquie Castelo Branco, Edward David Moreno Ordonez: Load Indices on Heterogeneous Systems- Past, Present and Future. JCIT 2(2): 49-57 (2007) | |
| 2005 | ||
| 7 | Edward D. Moreno, Fábio Dacêncio Pereira, Rodolfo B. Chiaramonte: A VLIW-based cryptoprocessor on FPGAs architecture and performance issues (abstract only). FPGA 2005: 278 | |
| 2002 | ||
| 6 | Edward David Moreno Ordonez: Hash Join Algorithms on SMPs Clusters: Effects of Netcaches on Its Scalability and Performance. J. Inf. Sci. Eng. 18(5): 815-824 (2002) | |
| 1998 | ||
| 5 | Edward D. Moreno, Sergio Takeo Kofuji: Improvements on bus technology will affect the benefits of remote caches in CC-NUMA architectures. Computers and Their Applications 1998: 397-400 | |
| 1997 | ||
| 4 | Edward D. Moreno, Sergio Takeo Kofuji, Marcelo H. Cintra: Prefetching and Multithreading Performance in Bus-Based Multiprocessors with Petri Nets. Euro-Par 1997: 1017-1024 | |
| 3 | Edward D. Moreno, Sergio Takeo Kofuji: Efficiency of remote access caches in future SMP-based CC-NUMA multiprocessors: initial results. ISPAN 1997: 190-197 | |
| 2 | Edward D. Moreno, Sergio Takeo Kofuji, Michael Stumm, Tarek S. Abdelrahman: Tuning Shared Network Cache Size vs. Second-Level Cache Size in Clusters-Based Multiprocessors. PaCT 1997: 398-399 | |
| 1996 | ||
| 1 | Edward David Moreno Ordonez, Sergio Takeo Kofuji: Performance evaluation of the fixed sequential prefetching on a bus-based multiprocessor: preliminary results. ISPAN 1996: 487-493 | |