 | 1999 |
|---|
| 6 |       | J. V. Tran,
Farnaz Mounes-Toussi,
S. N. Storino,
D. L. Stasiak:
SOI Implementation of a 64-Bit Adder.
ICCD 1999: 573- |
| 1998 |
|---|
| 5 | | Farnaz Mounes-Toussi,
David J. Lilja:
The Effect of using State-Based Priority Information in a Shared-Memory Multiprocessor Cache Replacement Policy.
ICPP 1998: 217-224 |
| 1995 |
|---|
| 4 | | Farnaz Mounes-Toussi,
David J. Lilja:
Write buffer design for cache-coherent shared-memory multiprocessors.
ICCD 1995: 506-511 |
| 3 | | Farnaz Mounes-Toussi,
David J. Lilja:
The Potential of Compile-Time Analysis to Adapt the Cache Coherence Enforcement Strategy to the Data Sharing Characteristics.
IEEE Trans. Parallel Distrib. Syst. 6(5): 470-481 (1995) |
| 1994 |
|---|
| 2 |  | Trung N. Nguyen,
Farnaz Mounes-Toussi,
David J. Lilja,
Zhiyuan Li:
A Compiler-Assisted Scheme for Adaptive Cache Coherence Enforcement.
IFIP PACT 1994: 69-78 |
| 1 | | Farnaz Mounes-Toussi,
David J. Lilja,
Zhiyuan Li:
An evaluation of a compiler optimization for improving the performance of a coherence directory.
International Conference on Supercomputing 1994: 75-84 |
