| 2005 | ||
|---|---|---|
| 4 | M. E. Litvin, S. Mourad: Self-reset logic for fast arithmetic applications. IEEE Trans. VLSI Syst. 13(4): 462-475 (2005) | |
| 3 | T. Egan, S. Mourad: Design-for-testability for embedded delay-locked loops. IEEE Trans. VLSI Syst. 13(8): 984-988 (2005) | |
| 2001 | ||
| 2 | S. L. Liu, S. Mourad, S. Krishnan: At-speed testing of data communications transceivers. ISCAS (4) 2001: 9-12 | |
| 2000 | ||
| 1 | S. L. Lin, S. Mourad, S. Krishnan: A BIST methodology for at-speed testing of data communications transceivers. Asian Test Symposium 2000: 216-221 | |
| 1 | T. Egan | [3] |
| 2 | S. Krishnan | [1] [2] |
| 3 | S. L. Lin | [1] |
| 4 | M. E. Litvin | [4] |
| 5 | S. L. Liu | [2] |