 | 2008 |
|---|
| 12 |       | Rosemary M. Francis,
Simon W. Moore,
Robert D. Mullins:
A Network of Time-Division Multiplexed Wiring for FPGAs.
NOCS 2008: 35-44 |
| 2007 |
|---|
| 11 | | Robert D. Mullins,
Simon W. Moore:
Demystifying Data-Driven and Pausible Clocking Schemes.
ASYNC 2007: 175-185 |
| 10 | | Arnab Banerjee,
Robert D. Mullins,
Simon W. Moore:
A Power and Energy Exploration of Network-on-Chip Architectures.
NOCS 2007: 163-172 |
| 2006 |
|---|
| 9 | | Robert D. Mullins,
Andrew West,
Simon W. Moore:
The design and implementation of a low-latency on-chip network.
ASP-DAC 2006: 164-169 |
| 2004 |
|---|
| 8 | | Robert D. Mullins,
Andrew West,
Simon W. Moore:
Low-Latency Virtual-Channel Routers for On-Chip Networks.
ISCA 2004: 188-197 |
| 2003 |
|---|
| 7 | | Jacques J. A. Fournier,
Simon W. Moore,
Huiyun Li,
Robert D. Mullins,
George S. Taylor:
Security Evaluation of Asynchronous Circuits.
CHES 2003: 137-151 |
| 6 | | Simon W. Moore,
Ross J. Anderson,
Robert D. Mullins,
George S. Taylor,
Jacques J. A. Fournier:
Balanced self-checking asynchronous logic for smart card applications.
Microprocessors and Microsystems 27(9): 421-430 (2003) |
| 2002 |
|---|
| 5 | | Simon W. Moore,
Robert D. Mullins,
Paul A. Cunningham,
Ross J. Anderson,
George S. Taylor:
Improving Smart Card Security Using Self-Timed Circuits.
ASYNC 2002: 211- |
| 4 | | George S. Taylor,
Simon W. Moore,
Robert D. Mullins,
Peter Robinson:
Point to Point GALS Interconnect.
ASYNC 2002: 69-75 |
| 2000 |
|---|
| 3 | | Simon W. Moore,
George S. Taylor,
Paul A. Cunningham,
Robert D. Mullins,
Peter Robinson:
Self-Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems.
ICCD 2000: 73- |
| 1999 |
|---|
| 2 | | D. K. Arvind,
Robert D. Mullins:
A Fully Asynchronous Superscalar Architecture.
IEEE PACT 1999: 17-22 |
| 1995 |
|---|
| 1 | | D. K. Arvind,
Robert D. Mullins,
Vinod E. F. Rebello:
Micronets: a model for decentralising control in asynchronous processor architectures.
ASYNC 1995: 190-199 |
