| 2009 | ||
|---|---|---|
| 13 | Arnab Banerjee, Pascal T. Wolkotte, Robert D. Mullins, Simon W. Moore, Gerard J. M. Smit: An Energy and Performance Exploration of Network-on-Chip Architectures. IEEE Trans. VLSI Syst. 17(3): 319-329 (2009) | |
| 2008 | ||
| 12 | Rosemary M. Francis, Simon W. Moore, Robert D. Mullins: A Network of Time-Division Multiplexed Wiring for FPGAs. NOCS 2008: 35-44 | |
| 2007 | ||
| 11 | Robert D. Mullins, Simon W. Moore: Demystifying Data-Driven and Pausible Clocking Schemes. ASYNC 2007: 175-185 | |
| 10 | Arnab Banerjee, Robert D. Mullins, Simon W. Moore: A Power and Energy Exploration of Network-on-Chip Architectures. NOCS 2007: 163-172 | |
| 2006 | ||
| 9 | Robert D. Mullins, Andrew West, Simon W. Moore: The design and implementation of a low-latency on-chip network. ASP-DAC 2006: 164-169 | |
| 2004 | ||
| 8 | Robert D. Mullins, Andrew West, Simon W. Moore: Low-Latency Virtual-Channel Routers for On-Chip Networks. ISCA 2004: 188-197 | |
| 2003 | ||
| 7 | Jacques J. A. Fournier, Simon W. Moore, Huiyun Li, Robert D. Mullins, George S. Taylor: Security Evaluation of Asynchronous Circuits. CHES 2003: 137-151 | |
| 6 | Simon W. Moore, Ross J. Anderson, Robert D. Mullins, George S. Taylor, Jacques J. A. Fournier: Balanced self-checking asynchronous logic for smart card applications. Microprocessors and Microsystems 27(9): 421-430 (2003) | |
| 2002 | ||
| 5 | Simon W. Moore, Robert D. Mullins, Paul A. Cunningham, Ross J. Anderson, George S. Taylor: Improving Smart Card Security Using Self-Timed Circuits. ASYNC 2002: 211-218 | |
| 4 | George S. Taylor, Simon W. Moore, Robert D. Mullins, Peter Robinson: Point to Point GALS Interconnect. ASYNC 2002: 69-75 | |
| 2000 | ||
| 3 | Simon W. Moore, George S. Taylor, Paul A. Cunningham, Robert D. Mullins, Peter Robinson: Self-Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems. ICCD 2000: 73- | |
| 1999 | ||
| 2 | D. K. Arvind, Robert D. Mullins: A Fully Asynchronous Superscalar Architecture. IEEE PACT 1999: 17-22 | |
| 1995 | ||
| 1 | D. K. Arvind, Robert D. Mullins, Vinod E. F. Rebello: Micronets: a model for decentralising control in asynchronous processor architectures. ASYNC 1995: 190-199 | |
| 1 | Ross J. Anderson | [5] [6] |
| 2 | D. K. Arvind (Damal Kandadai Arvind) | [1] [2] |
| 3 | Arnab Banerjee | [10] [13] |
| 4 | Paul A. Cunningham | [3] [5] |
| 5 | Jacques J. A. Fournier | [6] [7] |
| 6 | Rosemary M. Francis | [12] |
| 7 | Huiyun Li | [7] |
| 8 | Simon W. Moore | [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] |
| 9 | Vinod E. F. Rebello | [1] |
| 10 | Peter Robinson | [3] [4] |
| 11 | Gerard J. M. Smit | [13] |
| 12 | George S. Taylor | [3] [4] [5] [6] [7] |
| 13 | Andrew West | [8] [9] |
| 14 | Pascal T. Wolkotte | [13] |
Colors in the list of coauthors
Last update Fri May 25 01:42:58 2012 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page