Jun-Hee Mun

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2007

2 Jun-Hee Mun, Shung Han Cho, Sangjin Hong: Flexible Controller Design and Its Application for Concurrent Execution of Buffer Centric Dataflows. VLSI Signal Processing 47(3): 233-257 (2007)

2006

1 Sangjin Hong, Kyoung-Su Park, Jun-Hee Mun: Design and implementation of a high-speed matrix multiplier based on word-width decomposition. IEEE Trans. VLSI Syst. 14(4): 380-392 (2006)

	2007
2		Jun-Hee Mun, Shung Han Cho, Sangjin Hong: Flexible Controller Design and Its Application for Concurrent Execution of Buffer Centric Dataflows. VLSI Signal Processing 47(3): 233-257 (2007)
	2006
1		Sangjin Hong, Kyoung-Su Park, Jun-Hee Mun: Design and implementation of a high-speed matrix multiplier based on word-width decomposition. IEEE Trans. VLSI Syst. 14(4): 380-392 (2006)

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