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DBLP keys2009
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNiti Madan, Li Zhao, Naveen Muralimanohar, Aniruddha Udipi, Rajeev Balasubramonian, Ravishankar Iyer, Srihari Makineni, Donald Newell: Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy. HPCA 2009: 262-274
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLXiangyu Dong, Naveen Muralimanohar, Norman P. Jouppi, Richard Kaufmann, Yuan Xie: Leveraging 3D PCRAM technologies to reduce checkpoint overhead for future exascale systems. SC 2009
2008
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSeth H. Pugsley, Manu Awasthi, Niti Madan, Naveen Muralimanohar, Rajeev Balasubramonian: Scalable and reliable communication for hardware transactional memory. PACT 2008: 144-154
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNaveen Muralimanohar, Rajeev Balasubramonian, Norman P. Jouppi: Architecting Efficient Interconnects for Large Caches with CACTI 6.0. IEEE Micro 28(1): 69-79 (2008)
2007
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNaveen Muralimanohar, Rajeev Balasubramonian: Interconnect design considerations for large NUCA caches. ISCA 2007: 369-380
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNaveen Muralimanohar, Rajeev Balasubramonian, Norman P. Jouppi: Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0. MICRO 2007: 3-14
2006
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLLiqun Cheng, Naveen Muralimanohar, Karthik Ramani, Rajeev Balasubramonian, John B. Carter: Interconnect-Aware Coherence Protocols for Chip Multiprocessors. ISCA 2006: 339-351
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNaveen Muralimanohar, Karthik Ramani, Rajeev Balasubramonian: Power efficient resource scaling in partitioned architectures through dynamic heterogeneity. ISPASS 2006: 100-111
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRajeev Balasubramonian, Naveen Muralimanohar, Karthik Ramani, Liqun Cheng, John B. Carter: Leveraging Wire Properties at the Microarchitecture Level. IEEE Micro 26(6): 40-52 (2006)
2005
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRajeev Balasubramonian, Naveen Muralimanohar, Karthik Ramani, Venkatanand Venkatachalapathy: Microarchitectural Wire Management for Performance and Power in Partitioned Architectures. HPCA 2005: 28-39

Coauthor Index

1Manu Awasthi [8]
2Rajeev Balasubramonian [1] [2] [3] [4] [5] [6] [7] [8] [10]
3John B. Carter [2] [4]
4Liqun Cheng [2] [4]
5Xiangyu Dong [9]
6Ravishankar Iyer [10]
7Norman P. Jouppi [5] [7] [9]
8Richard Kaufmann [9]
9Niti Madan [8] [10]
10Srihari Makineni [10]
11Donald Newell [10]
12Seth H. Pugsley [8]
13Karthik Ramani [1] [2] [3] [4]
14Aniruddha Udipi [10]
15Venkatanand Venkatachalapathy [1]
16Yuan Xie [9]
17Li Zhao [10]

Copyright © Fri Nov 27 15:43:12 2009 by Michael Ley (ley@uni-trier.de)