Paul J. Murtagh

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1997

1 Paul J. Murtagh, Ah Chung Tsoi: A Reconfigurable Bit-Serial VLSI Systolic Array Neuro-Chip. J. Parallel Distrib. Comput. 44(1): 53-70 (1997)

	1997
1		Paul J. Murtagh, Ah Chung Tsoi: A Reconfigurable Bit-Serial VLSI Systolic Array Neuro-Chip. J. Parallel Distrib. Comput. 44(1): 53-70 (1997)

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