| 2009 | ||
|---|---|---|
| 2 | Kelageri Nagaraj, Sandip Kundu: Process variation mitigation via post silicon clock tuning. ACM Great Lakes Symposium on VLSI 2009: 227-232 | |
| 1 | Kelageri Nagaraj, Sandip Kundu: A study on placement of post silicon clock tuning buffers for mitigating impact of process variation. DATE 2009: 292-295 | |
| 1 | Sandip Kundu | [1] [2] |