Vaibhav Nawale Coauthor index DBLP Vis pubzone.org

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DBLP keys2007
2no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVaibhav Nawale, Thomas W. Chen: Steady state noise modeling in computer chips using neural networks. Artificial Intelligence and Applications 2007: 19-24
2006
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVaibhav Nawale, Thomas W. Chen: Optimal useful clock skew scheduling in the presence of variations using robust ILP formulations. ICCAD 2006: 27-32

Coauthor Index

1Thomas W. Chen [1] [2]

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