 | 2006 |
|---|
| 8 |       | Dan Nicolaescu,
Babak Salamat,
Alexander V. Veidenbaum:
Fast Speculative Address Generation and Way Caching for Reducing L1 Data Cache Energy.
ICCD 2006 |
| 2004 |
|---|
| 7 | | Juan L. Aragón,
Dan Nicolaescu,
Alexander V. Veidenbaum,
Ana-Maria Badulescu:
Energy-Efficient Design for Highly Associative Instruction Caches in Next-Generation Embedded Processors.
DATE 2004: 1374-1375 |
| 6 | | Alexander V. Veidenbaum,
Dan Nicolaescu:
Low Energy, Highly-Associative Cache Design for Embedded Processors.
ICCD 2004: 332-335 |
| 5 | | Dan Nicolaescu,
Alexander V. Veidenbaum,
Alexandru Nicolau:
Caching Values in the Load Store Queue.
MASCOTS 2004: 580-587 |
| 2003 |
|---|
| 4 | | Dan Nicolaescu,
Alexander V. Veidenbaum,
Alexandru Nicolau:
Reducing Power Consumption for High-Associativity Data Caches in Embedded Processors.
DATE 2003: 11064-11069 |
| 3 | | Dan Nicolaescu,
Alexander V. Veidenbaum,
Alexandru Nicolau:
Reducing data cache energy consumption via cached load/store queue.
ISLPED 2003: 252-257 |
| 2000 |
|---|
| 2 | | Xiaomei Ji,
Dan Nicolaescu,
Alexander V. Veidenbaum,
Alexandru Nicolau,
Rajesh K. Gupta:
Compiler-Directed Cache Assist Adaptivity.
ISHPC 2000: 88-104 |
| 1 | | Dan Nicolaescu,
Xiaomei Ji,
Alexander V. Veidenbaum,
Alexandru Nicolau,
Rajesh K. Gupta:
Compiler-Directed Cache Line Size Adaptivity.
Intelligent Memory Systems 2000: 183-187 |
