| 2009 | ||
|---|---|---|
| 22 | Vinayak Nagpal, Sameer Pawar, David Tse, Borivoje Nikolic: Cooperative Multiplexing in the Multiple Antenna Half Duplex Relay Channel CoRR abs/0901.2164: (2009) | |
| 21 | Lara Dolecek, P. Lee, Zhengya Zhang, Venkat Anantharam, Borivoje Nikolic, Martin J. Wainwright: Predicting error floors of structured LDPC codes: deterministic bounds and estimates. IEEE Journal on Selected Areas in Communications 27(6): 908-917 (2009) | |
| 2008 | ||
| 20 | Zhengya Zhang, Lara Dolecek, Borivoje Nikolic, Venkat Anantharam, Martin J. Wainwright: Lowering LDPC Error Floors by Postprocessing. GLOBECOM 2008: 3074-3079 | |
| 2007 | ||
| 19 | Radu Marculescu, Borivoje Nikolic, Alberto L. Sangiovanni-Vincentelli: Fresh air: the emerging landscape of design for networked embedded systems. CODES+ISSS 2007: 124 | |
| 18 | Zhengya Zhang, Lara Dolecek, Martin J. Wainwright, Venkat Anantharam, Borivoje Nikolic: Quantization Effects in Low-Density Parity-Check Decoders. ICC 2007: 6231-6237 | |
| 17 | Lara Dolecek, Zhengya Zhang, Venkat Anantharam, Martin J. Wainwright, Borivoje Nikolic: Analysis of Absorbing Sets for Array-Based LDPC Codes. ICC 2007: 6261-6268 | |
| 16 | Zhengya Zhang, Renaldi Winoto, Ahmad Bahai, Borivoje Nikolic: Peak-to-Average Power Ratio Reduction in an FDM Broadcast System. SiPS 2007: 25-30 | |
| 2006 | ||
| 15 | Zhengya Zhang, Lara Dolecek, Borivoje Nikolic, Venkat Anantharam, Martin J. Wainwright: Investigation of Error Floors of Structured Low-Density Parity-Check Codes by Hardware Emulation. GLOBECOM 2006 | |
| 14 | Radu Zlatanovici, Borivoje Nikolic: Power - Performance Optimization for Custom Digital Circuits. J. Low Power Electronics 2(1): 113-120 (2006) | |
| 2005 | ||
| 13 | Zheng Guo, Sriram Balasubramanian, Radu Zlatanovici, Tsu-Jae King, Borivoje Nikolic: FinFET-based SRAM design. ISLPED 2005: 2-7 | |
| 12 | Radu Zlatanovici, Borivoje Nikolic: Power - Performance Optimization for Custom Digital Circuits. PATMOS 2005: 404-414 | |
| 2004 | ||
| 11 | Sokratis D. Vamvakos, Carl Werner, Borivoje Nikolic: Phase-locked loop architecture for adaptive jitter optimization. ISCAS (4) 2004: 161-164 | |
| 10 | Fujio Ishihara, Farhana Sheikh, Borivoje Nikolic: Level conversion for dual-supply systems. IEEE Trans. VLSI Syst. 12(2): 185-195 (2004) | |
| 2003 | ||
| 9 | Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Allen Chen, Nathan Chan, Robert W. Brodersen, Borivoje Nikolic: Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment. IEEE International Workshop on Rapid System Prototyping 2003: 148- | |
| 8 | Fujio Ishihara, Farhana Sheikh, Borivoje Nikolic: Level conversion for dual-supply systems. ISLPED 2003: 164-167 | |
| 2002 | ||
| 7 | Robert W. Brodersen, Mark Horowitz, Dejan Markovic, Borivoje Nikolic, Vladimir Stojanovic: Methods for true power minimization. ICCAD 2002: 35-42 | |
| 6 | Stephanie Augsburger, Borivoje Nikolic: Combining Dual-Supply, Dual-Threshold and Transistor Sizing for Power Reduction. ICCD 2002: 316-321 | |
| 2001 | ||
| 5 | David G. Chinnery, Borivoje Nikolic, Kurt Keutzer: Achieving 550Mhz in an ASIC Methodology. DAC 2001: 420-425 | |
| 4 | Julio Leao da Silva Jr., J. Shamberger, M. Josie Ammer, C. Guo, Suet-Fei Li, Rahul C. Shah, Tim Tuan, Michael Sheets, Jan M. Rabaey, Borivoje Nikolic, Alberto L. Sangiovanni-Vincentelli, Paul K. Wright: Design methodology for PicoRadio networks. DATE 2001: 314-325 | |
| 3 | Dejan Markovic, Borivoje Nikolic, Robert W. Brodersen: Analysis and design of low-energy flip-flops. ISLPED 2001: 52-55 | |
| 2000 | ||
| 2 | Dragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current: Clocked CMOS adiabatic logic with integrated single-phase power-clock supply. IEEE Trans. VLSI Syst. 8(4): 460-463 (2000) | |
| 1997 | ||
| 1 | Dragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current: Clocked CMOS adiabatic logic with integrated single-phase power-clock supply: experimental results. ISLPED 1997: 323-327 | |