 | 2009 |
|---|
| 9 |       | Sjoerd Meijer,
Hristo Nikolov,
Todor Stefanov:
On compile-time evaluation of process partitioning transformations for Kahn process networks.
CODES+ISSS 2009: 31-40 |
| 2008 |
|---|
| 8 | | Hristo Nikolov,
Mark Thompson,
Todor Stefanov,
Andy D. Pimentel,
Simon Polstra,
R. Bose,
Claudiu Zissulescu,
Ed F. Deprettere:
Daedalus: toward composable multimedia MP-SoC design.
DAC 2008: 574-579 |
| 7 | | Andy D. Pimentel,
Todor Stefanov,
Hristo Nikolov,
Mark Thompson,
Simon Polstra,
Ed F. Deprettere:
Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study.
SAMOS 2008: 167-176 |
| 6 | | Hristo Nikolov,
Todor Stefanov,
Ed F. Deprettere:
Systematic and Automated Multiprocessor System Design, Programming, and Implementation.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 542-555 (2008) |
| 2007 |
|---|
| 5 | | Mark Thompson,
Hristo Nikolov,
Todor Stefanov,
Andy D. Pimentel,
Cagkan Erbas,
Simon Polstra,
Ed F. Deprettere:
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs.
CODES+ISSS 2007: 9-14 |
| 4 | | Hristo Nikolov,
Todor Stefanov,
Ed F. Deprettere:
Efficient External Memory Interface for Multi-processor Platforms Realized on FPGA Chips.
FPL 2007: 580-584 |
| 2006 |
|---|
| 3 | | Hristo Nikolov,
Todor Stefanov,
Ed F. Deprettere:
Multi-processor system design with ESPAM.
CODES+ISSS 2006: 211-216 |
| 2 | | Hristo Nikolov,
Todor Stefanov,
Ed F. Deprettere:
Efficient Automated Synthesis, Programing, and Implementation of Multi-Processor Platforms on FPGA Chips.
FPL 2006: 1-6 |
| 2005 |
|---|
| 1 | | Hristo Nikolov,
Todor Stefanov,
Ed F. Deprettere:
Modeling and FPGA Implementation of Applications Using Parameterized Process Networks with Non-Static Parameters.
FCCM 2005: 255-263 |
