| 2009 | ||
|---|---|---|
| 20 | Tom Borgstrom, Eshel Haritan, Ron Wilson, David Abada, Andrew Dauman, Ramesh Chandra, Olivier Mielo, Chuck Cruse, Achim Nohl: System prototypes: virtual, hardware or hybrid? DAC 2009: 1-3 | |
| 19 | Rainer Leupers, Andras Vajda, Marco Bekooij, Soonhoi Ha, Rainer Dömer, Achim Nohl: Programming MPSoC platforms: Road works ahead! DATE 2009: 1584-1589 | |
| 2008 | ||
| 18 | Eshel Haritan, Toshihiro Hattori, Hiroyuki Yagi, Pierre G. Paulin, Wayne Wolf, Achim Nohl, Drew Wingard, Mike Muller: Multicore design is the challenge! what is the solution? DAC 2008: 128-130 | |
| 2006 | ||
| 17 | Drew Taussig, Andreas Hoffmann, Achim Nohl, Andrea Kroll: Application Specific Processing: A Tools Approach. ASAP 2006: 56-64 | |
| 2005 | ||
| 16 | Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tom Michiels, Achim Nohl, Tim Kogel: Retargetable generation of TLM bus interfaces for MP-SoC platforms. CODES+ISSS 2005: 249-254 | |
| 15 | Andreas Hoffmann, Frank Fiedler, Achim Nohl, Surender Parupalli: A Methodology and Tooling Enabling Application Specific Processor Design. VLSI Design 2005: 399-404 | |
| 2004 | ||
| 14 | Gunnar Braun, Achim Nohl, Weihua Sheng, Jianjiang Ceng, Manuel Hohenauer, Hanno Scharwächter, Rainer Leupers, Heinrich Meyr: A novel approach for flexible and consistent ADL-driven ASIP design. DAC 2004: 717-722 | |
| 13 | Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl: A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform. DATE 2004: 1256-1263 | |
| 12 | Oliver Schliebusch, Anupam Chattopadhyay, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Mario Steinert, Gunnar Braun, Achim Nohl: RTL Processor Synthesis for Architecture Exploration and Implementation. DATE 2004: 156-160 | |
| 11 | Gunnar Braun, Achim Nohl, Andreas Hoffmann, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr: A universal technique for fast and flexible instruction-set architecture simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 23(12): 1625-1639 (2004) | |
| 2003 | ||
| 10 | Andreas Wieferink, Tim Kogel, Achim Nohl, Andreas Hoffmann: Generic Tool-Set for SoC Mulitiprocessor Debugging and Synchronization. ASAP 2003: 161-171 | |
| 9 | Achim Nohl, Volker Greive, Gunnar Braun, Andreas Hoffmann, Rainer Leupers, Oliver Schliebusch, Heinrich Meyr: Instruction encoding synthesis for architecture exploration using hierarchical processor models. DAC 2003: 262-267 | |
| 8 | Gunnar Braun, Andreas Wieferink, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Achim Nohl: Processor/Memory Co-Exploration on Multiple Abstraction Levels. DATE 2003: 10966-10973 | |
| 2002 | ||
| 7 | Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Andreas Hoffmann: A universal technique for fast and flexible instruction-set architecture simulation. DAC 2002: 22-27 | |
| 6 | Oliver Wahlen, Tilman Glökler, Achim Nohl, Andreas Hoffmann, Rainer Leupers, Heinrich Meyr: Application specific compiler/architecture codesign: a case study. LCTES-SCOPES 2002: 185-193 | |
| 5 | Oliver Schliebusch, Andreas Hoffmann, Achim Nohl, Gunnar Braun, Heinrich Meyr: Architecture Implementation Using the Machine Description Language LISA. VLSI Design 2002: 239-244 | |
| 2001 | ||
| 4 | Andreas Hoffmann, Achim Nohl, Stefan Pees, Gunnar Braun, Heinrich Meyr: Generating production quality software development tools using a machine description language. DATE 2001: 674-678 | |
| 3 | Andreas Hoffmann, Oliver Schliebusch, Achim Nohl, Gunnar Braun, Oliver Wahlen, Heinrich Meyr: A Methodology for the Design of Application Specific Instruction Set Processors (ASIP) using the Machine Description Language LISA. ICCAD 2001: 625-630 | |
| 2 | Gunnar Braun, Andreas Hoffmann, Achim Nohl, Heinrich Meyr: Using static scheduling techniques for the retargeting of high speed, compiled simulators for embedded processors from an abstract machine description. ISSS 2001: 57-62 | |
| 1 | Andreas Hoffmann, Tim Kogel, Achim Nohl, Gunnar Braun, Oliver Schliebusch, Oliver Wahlen, Andreas Wieferink, Heinrich Meyr: A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language. IEEE Trans. on CAD of Integrated Circuits and Systems 20(11): 1338-1354 (2001) | |