Saeid Nooshabadi

	2009
31		Ge Chen, Saeid Nooshabadi, Steven G. Duvall: An optimization strategy for low energy and high performance for the on-chip interconnect signalling. ISLPED 2009: 287-290
30		Héctor Navarro, Saeid Nooshabadi, Juan A. Montiel-Nelson, Victor Navarro-Botello, J. Sosa, José C. García: A geometric approach to register transfer level satisfiability. ISQED 2009: 272-275
29		Michael Dyer, Saeid Nooshabadi, David S. Taubman: Design and Analysis of System on a Chip Encoder for JPEG2000. IEEE Trans. Circuits Syst. Video Techn. 19(2): 215-225 (2009)
	2008
28		Simone Zezza, Maurizio Martina, Guido Masera, Saeid Nooshabadi: Error resilient JPEG2000 decoding for wireless applications. ICIP 2008: 2016-2019
27		Amit Kumar Gupta, Saeid Nooshabadi, David S. Taubman: Efficient Interfacing of DWT and EBCOT in JPEG2000. IEEE Trans. Circuits Syst. Video Techn. 18(5): 687-693 (2008)
	2007
26		Michael Dyer, Saeid Nooshabadi, David S. Taubman: Analysis of Multiple Parallel Block Coding in JPEG2000. ICIP (5) 2007: 173-176
25		Amit Kumar Gupta, Saeid Nooshabadi, David Taubman: Efficient Data Transfer Techniques and VLSI architecture for DWT-Block Coder Integration of JPEG2000 Encoder. ISCAS 2007: 1365-1368
24		José C. García, Juan A. Montiel-Nelson, Saeid Nooshabadi: Adaptive Low/High Voltage Swing CMOS Driver for On-Chip Interconnects. ISCAS 2007: 881-884
23		Amit Kumar Gupta, Saeid Nooshabadi: Novel Distortion Estimation Technique for Hardware-Based JPEG2000 Encoder System. IEEE Trans. Circuits Syst. Video Techn. 17(7): 918-923 (2007)
22		Victor Navarro-Botello, Juan A. Montiel-Nelson, Saeid Nooshabadi: High performance low power CMOS dynamic logic for arithmetic circuits. Microelectronics Journal 38(4-5): 482-488 (2007)
	2006
21		José C. García, Juan A. Montiel-Nelson, Saeid Nooshabadi: Low Power Bootstrapped CMOS Differential Cross Coupled Driver. APCCAS 2006: 704-707
20		José C. García, Juan A. Montiel-Nelson, Saeid Nooshabadi: Bootstrapped full--swing CMOS driver for low supply voltage operation. DATE 2006: 410-411
19		F. Sobhanmanesh, Saeid Nooshabadi: VLSI architecture for 4×4 16-QAM V-BLAST decoder. ISCAS 2006
18		Amit Kumar Gupta, Saeid Nooshabadi, David Taubman, Michael Dyer: Realizing Low-Cost High-Throughput General-Purpose Block Encoder for JPEG2000. IEEE Trans. Circuits Syst. Video Techn. 16(7): 843-858 (2006)
17		Victor Navarro-Botello, Juan A. Montiel-Nelson, Saeid Nooshabadi: Low Power and High Performance Arithmetic Circuits in Feedthrough CMOS Logic Family for Low Power Applications. J. Low Power Electronics 2(2): 300-307 (2006)
	2005
16		Michael Dyer, David Taubman, Saeid Nooshabadi: Reduced latency arithmetic decoder for JPEG2000 block decoding. ISCAS (3) 2005: 2076-2079
15		Amit Kumar Gupta, Saeid Nooshabadi, David S. Taubman: Efficient VLSI architecture for buffer used in EBCOT of JPEG2000 encoder. ISCAS (5) 2005: 4361-4364
14		Amit Kumar Gupta, Saeid Nooshabadi, David S. Taubman: Optimal 2 sub-bank memory architecture for bit plane coder of JPEG2000. ISCAS (5) 2005: 4373-4376
13		A. Pouladi, Saeid Nooshabadi: Opcode encoding for low power embedded systems. ISCAS (5) 2005: 5262-5265
12		Chul Kim, A. M. Rassau, Stefan Lachowicz, Saeid Nooshabadi, Kamran Eshraghian: 3D-SoftChip: A Novel 3D Vertically Integrated Adaptive Computing System. VLSI-SoC 2005: 71-86
11		Amit Kumar Gupta, Saeid Nooshabadi, David Taubman: Concurrent Symbol Processing Capable VLSI Architecture for Bit Plane Coder of JPEG2000. IEICE Transactions 88-D(8): 1878-1884 (2005)
	2004
10		Michael Dyer, David S. Taubman, Saeid Nooshabadi: Improved throughput arithmetic coder for jpeg2000. ICIP 2004: 2817-2820
9		K. Oteng-Amoako, Saeid Nooshabadi, J. Yuan: Design and Performance of Asymmetric Turbo Coded Hybrid-ARQ. ICT 2004: 1369-1381
	2001
8		Saeid Nooshabadi: Modelling of effects of temperature profile in the MOS transistor characteristics. ISCAS (1) 2001: 81-84
7		Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez, Saeid Nooshabadi: A compact layout technique to minimize high frequency switching effects in high speed circuits. ISCAS (4) 2001: 96-99
6		J. Sosa, Juan A. Montiel-Nelson, Saeid Nooshabadi: Efficient computation of the area/power consumption versus delay tradeoff curve for circuit critical path optimization. ISCAS (5) 2001: 527-530
	2000
5		Saeid Nooshabadi, Juan A. Montiel-Nelson, Antonio Núñez, Roberto Sarmiento, J. Sosa: A Single Phase Latch for High Speed GaAs Domino Circuits. DATE 2000: 760
	1999
4		Juan A. Montiel-Nelson, Saeid Nooshabadi, V. de Armas, Roberto Sarmiento, Antonio Núñez: High Speed GaAs Subsystem Design using Feed Through Logic. DATE 1999: 509-
	1998
3		Saeid Nooshabadi, G. S. Visweswaran, D. Nagchoudhuri: Current Mode Ternary D/A Converter. VLSI Design 1998: 244-248
	1997
2		Kamran Eshraghian, Juan A. Montiel-Nelson, Saeid Nooshabadi: An Asynchronous Morphological Processor for Multi-Media Applications. VLSI Design 1997: 336-341
1		Saeid Nooshabadi, Juan A. Montiel-Nelson, G. S. Visweswaran, D. Nagchoudhuri: Micropipeline Architecture for Multiplier-less FIR Filters. VLSI Design 1997: 451-456

Coauthor Index

1	V. de Armas	[4] [7]
2	Ge Chen	[31]
3	Steven G. Duvall	[31]
4	Michael Dyer	[10] [16] [18] [26] [29]
5	Kamran Eshraghian	[2] [12]
6	José C. García	[20] [21] [24] [30]
7	Amit Kumar Gupta	[11] [14] [15] [18] [23] [25] [27]
8	Chul Kim	[12]
9	Stefan Lachowicz	[12]
10	Maurizio Martina	[28]
11	Guido Masera	[28]
12	Juan A. Montiel-Nelson	[1] [2] [4] [5] [6] [7] [17] [20] [21] [22] [24] [30]
13	D. Nagchoudhuri	[1] [3]
14	Héctor Navarro	[30]
15	Victor Navarro-Botello	[17] [22] [30]
16	Antonio Núñez	[4] [5] [7]
17	K. Oteng-Amoako	[9]
18	A. Pouladi	[13]
19	A. M. Rassau	[12]
20	Roberto Sarmiento	[4] [5] [7]
21	F. Sobhanmanesh	[19]
22	J. Sosa	[5] [6] [30]
23	David S. Taubman (David Taubman)	[10] [11] [14] [15] [16] [18] [25] [26] [27] [29]
24	G. S. Visweswaran	[1] [3]
25	J. Yuan	[9]
26	Simone Zezza	[28]

Colors in the list of coauthors